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JPH01160111A |
PURPOSE:To attain plural count by applying time division to a count register and a decrementer (or incrementer) so as to use them effectively thereby preventing the increase in the hardware. CONSTITUTION:Two registers 100, 200, a count r...
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JPH01157616A |
PURPOSE: To execute the stable action of a circuit at the time of utilizing a high-speed clock by outputting the output signal level of the storing means of a preceding stage synchronizing to the clock or holding the already-outputted ou...
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JPH0186728U |
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JPH01144725A |
PURPOSE:To execute the odd number dividing of 1/(2N-1) of a duty ratio 1/2 output by equipping a 1/2N dividing circuit with an N-step shift register, to which a D-flip-flop is linked, and a multiplying circuit to multiply an input clock ...
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JPH01133416A |
PURPOSE: To obtain a frequency dividing circuit having a simple constitution and small scale by providing (n) stages of FFs, FF1∼FFn, and an AND circuit which takes the AND of the inverted output of the 1st-stage FF, FF1, and the clock...
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JPH0173894U |
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JPH0172733U |
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JPH0172734U |
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JPH0172735U |
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JPH01120910A |
PURPOSE: To attain frequency division of non-integral number by providing a timing generation circuit, a timing selection circuit, a 1st frequency divider circuit and a 2nd frequency divider circuit with small size circuitry and low powe...
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JPH0170432U |
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JPH01115219A |
PURPOSE:To attain frequency division with simplified constitution by making two input exclusive inversion OR circuits store the states of H and L, in which one input is fixed to H and transferring the output between the two circuits mutu...
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JPH0167828U |
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JPH01112820A |
PURPOSE: To make the title device small in size and to prevent mis-step of a step counter by driving a flip-flop and a clock pulse generating circuit based on the location of a detection object and a counter input signal, detecting the m...
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JPH01112821A |
PURPOSE: To attain accurate and stable frequency division processing by a minimum number of stages by counting a clock pulse passing through a 1st gate means, generating an output signal when the count reaches a half the frequency divisi...
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JPH01112819A |
PURPOSE:To continue clock generation when the supply of a reference clock signal is interrupted by providing a reset signal generating means and a clock generation circuit and generating a clock in the clock generation circuit based on a...
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JPH01108807A |
PURPOSE: To immediately obtain pulses having a desired frequency after the setting of the frequency division ratio by summing a digital value given to on adder circuit to an output of a latch circuit every reception of a pulse generated ...
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JPH01103026A |
PURPOSE: To preferentially execute a load operation by taking the logic of a clear pulse and a load pulse and supplying its output to a clear terminal to reverse virtually the priority of a clear operation and the load operation. CONSTIT...
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JPH01101732A |
PURPOSE: To obtain an exact count value without any influence to the duty factor or speed of a clock for timing in order to count an input pulse by holding a preceding dividing output when the input pulse is an L. CONSTITUTION: For a div...
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JPH0199321A |
PURPOSE: To realize a multi-stage counter circuit with simple constitution by applying count of a prescribed digit, using a count means to count low-order digits and using a sequential means to count high-order digits and applying carryo...
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JPH0194723A |
PURPOSE: To remove the uncertainty of a frequency-divided phase by providing a one-bit width pulse generating circuit to input plural digital signals of the same transmitting speed and control the frequency dividing means with a phase co...
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JPH0119773B2 |
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JPH0191528A |
PURPOSE: To attain stable operation of a variable frequency division stage by always putting a master stage in an operating state in a set/reset flip-flop being a component of the variable frequency divider stage, fetching an output sign...
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JPS6489618A |
PURPOSE: To detect the rotational angle of a motor over a wide range of rotational speed from a low speed to a high speed with high accuracy by providing an encoder to output the pulse of a frequency to correspond to the rotational speed...
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JPS6452320U |
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JPS6481524A |
PURPOSE: To attain accurate frequency division even when the frequency of a clock signal gets higher by starting the inversion while a D latch circuit is still in the hold mode. CONSTITUTION: When a half period of the clock signal is sho...
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JPS6481525A |
PURPOSE: To prevent voltage fluctuation of a power line in an integrated circuit caused due to the current of charge/discharge of a flip-flop circuit by decreasing the number of flip-flop circuits inverted simultaneously. CONSTITUTION: A...
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JPS6480130A |
PURPOSE: To write a count data entirely asynchronously with a timing signal by providing a latch latching data synchronously with a timing signal causing the count of a count element to the pre-stage of a data input of the count element....
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JPS6462919A |
PURPOSE: To generate a duty control pulse with high accuracy by a digital element circuit by supplying an output of a clock signal counter to a duty ratio decoder and a frequency decoder to apply logic operation to outputs of both the ci...
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JPS6462021A |
PURPOSE: To obtain a variable frequency divider circuit not incurring much trouble by receiving a value A set by an m-bit binary number and varying the frequency divider ratio while varying the setting value A. CONSTITUTION: Number of ou...
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JPS6461118A |
PURPOSE: To provide two functions to one circuit by bringing J, K terminals of a JK flip-flop to all high level to act it as a flip-flop and bringing the levels of the J, K terminals opposedly to each other to cause D-FF operation thereb...
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JPS6458117A |
PURPOSE: To vary the frequency with continuous phase over a wide frequency range with simple constitution by multiplying an output frequency of a variable frequency oscillator whose phase is continuous, synchronizing a frequency switchin...
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JPS6454946A |
PURPOSE: To attain the separation of a high speed signal into n-set of signals without delay adjustment of the signal, by giving an l-bit output of a counter as a selector signal to a selector circuit. CONSTITUTION: A selector circuit 3 ...
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JPS6454929A |
PURPOSE: To attain high speed and low power for the titled circuit as a whole by constituting a variable frequency division section by a master slave flip-flop and an expanding section by an edge trigger flip-flop. CONSTITUTION: If a hig...
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JPS6451718A |
PURPOSE: To realize an ultrahigh speed counter circuit with very a few number of components and simple circuit configuration by connecting a node between a constant current source and a series connection of resonance tunnel diodes to an ...
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JPS6449320A |
PURPOSE: To equally set a period of an output pulse without allowing the frequency of a counting clock to become higher unnecessary, by dispersing equally a fraction generated at the time of division, by an equally dispersing means. CONS...
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JPS6449424A |
PURPOSE: To enable a settable range to be extended, by constituting the titled device of a swallow counter and a programmable counter by using a 2 modulus pre-scaler, and switching a frequency division ratio. CONSTITUTION: The 2 modulus ...
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JPS6447119A |
PURPOSE: To increase a strobe value by providing a detector inputting a counter output being the result of increasing a setting value of a received reference signal and a clock so as to increase the pulse period by each period of the clo...
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JPS6446317A |
PURPOSE: To easily increase a quantity of information representing relative relation, by controlling a counter by using a control pulse which represents the difference of first and second timing signals on a time base. CONSTITUTION: A de...
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JPS648826B2 |
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JPS6441329A |
PURPOSE: To attain stable operation even at a high frequency region by feeding back a frequency division signal from a differentiation amplifying circuit receiving a complementary mixing signal from a mixing circuit to the mixing circuit...
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JPS6441330A |
PURPOSE: To prevent surely the free-funning oscillation by applying in advance a DC offset so that 2-signal of a master flip-flop and a slave flip-flop is inputted when the hold side of a differential switch of each flip-flop is in a no-...
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JPS6439120A |
PURPOSE: To finely change the period without using a high-speed clock by using the delay time of a delay line to change the period less than an input clock. CONSTITUTION: The output has delay times 0, , 2 and 3 against the clock signal s...
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JPS647350B2 |
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JPS6437118A |
PURPOSE: To quickly perform the counting operation by discriminating carry or borrow with values which are kept in states before counting until the output of an up-count clock or a down-count clock is terminated even after the counting o...
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JPS6436218A |
PURPOSE: To make the duty nearly 50% by providing an n-stage of D type FF, a logic circuit, and a D type FF circuit using an output of the logic circuit as the clock input, using the inverted output as the data input and using the output...
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JPS6436217A |
PURPOSE: To ensure the resetting by outputting a decode pulse when the count reaches N-1 and using a 2nd clock signal having a frequency being an integral multiple of the frequency of a 1st clock signal for count-up so as to apply differ...
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JPS6423135U |
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JPS6436121A |
PURPOSE: To reduce the maximum value of the operation confirming time of a multistage counter by providing a negative logic AND gate (or positive logic OR gate) and arranging the leading timing of a signal for shifting a 2nd and succeedi...
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JPS6430325A |
PURPOSE: To attain the shifting when a frequency-dividing ratio is made variable, in a short time by comparing the inversion output terminal (or non-inversion output terminal) of respective T type flip flop FF to constitute a counter and...
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