| Document |
Document Title |
|
WO/2013/157127A1 |
The present invention relates to a ΔΣ modulator and a ΔΣ A/D converter, wherein, with a simple configuration, by accelerating a settling time constant of a final stage integrator, a sampling frequency of a ΔΣ modulator overall is a...
|
|
WO/2013/153188A1 |
The present invention relates to a method for converting an input analog signal into a plurality of digital signals. Said conversion assumes a first digitization of said signal by a sigma-delta convertor on a main frequency band. The dig...
|
|
WO/2013/152773A2 |
The present invention relates to a system for galvanic isolation between an analogue input signal and an analogue output signal, which system performs an analogue to digital conversion of the input signals into input digital data. Hereby...
|
|
WO/2013/138645A1 |
A sigma-delta modulator (SDM) (102) modifies an input signal received from a digital modulator (202) to generate a noise-shaped signal for a digital pulse-width modulator (PWM) (204) formed from a plurality of noise-shaping levels. PWM (...
|
|
WO/2013/136460A1 |
The carrier wave received by the wireless equipment is down-converted by a down-converter circuit with a configuration that is not easily affected by temperature changes and changes due to the passage of time. The wireless equipment (1) ...
|
|
WO/2013/136676A1 |
An AD conversion circuit (10) is provided with: a clock generation circuit (150) that generates clock signals (211 and 212) including a first initial period (T2) that is either a high period or a low period and is the first period after ...
|
|
WO/2013/126447A1 |
A continuous time sigma delta (ΣΔ) analog-to-digital conversion (ADC) circuit is described. The circuit includes a current mode mixing circuitry (22) responsive to a plurality of input current signals to provide a mixed current signal ...
|
|
WO/2013/125522A1 |
This signal conversion method includes converting an input signal to a one-bit pulse array representing an analog signal. In the one-bit pulse array, a pulse rise waveform (frise) has a first strain component with respect to the ideal pu...
|
|
WO/2013/119945A1 |
A sigma delta modulator may include a loop filter and an adder configured to accept an output of the loop filter and a dither input signal. The adder may be further configured to combine the output of the loop filter and the dither input...
|
|
WO/2013/110173A1 |
A digital infinite impulse response filter has a plurality of cascaded filter elements, with each filter element defining a pole of the filter and wherein the poles lie inside a unit circle. The filter elements are configured such that t...
|
|
WO/2013/099176A1 |
This DEM circuit (130) is provided with: a switch (131) which receives a digital input signal (SD1) of N bits (N is an integer that is greater than or equal to 2) and cyclically shifts bit positions of the digital input signal (SD1) on t...
|
|
WO/2013/098181A1 |
Continuous-time MASH sigma-delta ADC with a first modulator with 1.5 bit and a second modulator with 1 bit each receiving also the feedback from the other modulator. Sampling is at higher rate at the second modulator and decimation is pe...
|
|
WO/2013/094081A1 |
A delta-sigma A/D converter (100) comprises: a loop filter (101) further comprising a resonance filter (103); a quantizer (104); and a feedback D/A converter (106). The resonance filter (103) further comprises a resonator provided with a...
|
|
WO/2013/087221A2 |
In the prior art, a delta-signal modulator (DSM) having a multi-bit signal at the output is often used and audio signals are often to be amplified. The prior art therefore has a significantly lower frequency range, a narrower bandwidth a...
|
|
WO/2013/090332A1 |
A smoke detection sensor ion chamber has a leakage current that is dependent upon the permittivity of the ionized gas (air) in the chamber. Smoke from typical fires is mainly composed of unbumed carbon that has diffused in the surroundin...
|
|
WO/2013/080314A1 |
The objective of the invention is to increase information amount that can be wirelessly transferred per frequency band in a dual-channel wireless communication system. A wireless communication system comprises a transmitter (10) and a re...
|
|
WO/2013/074012A1 |
A continuous-time ΔΣ-ADC (1) is disclosed, comprising a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC (1) at sample instants nT. The ΔΣ-ADC (1) further comprises two or more DACs (...
|
|
WO/2013/074010A1 |
A continuous-time ΔΣ-ADC (1) is disclosed. It comprises a sampled quantizer (5) arranged to generate samples y(n) of a digital output signal of the ΔΣ-ADC (1) at sample instants nT, where n is an integer sequence index and T is a sam...
|
|
WO/2013/074187A1 |
A method and a corresponding device for reducing inter-channel coupling in a circuit having a plurality of channels includes injecting a randomly determined amount of dither into a first channel of a circuit having a plurality of channel...
|
|
WO/2013/068182A1 |
The invention relates to a delta-sigma converter (100) for a sensor signal (112), more particularly a signal of a rotation rate sensor, wherein the delta-sigma converter (100) is designed to emit a digital output signal (114) using the s...
|
|
WO/2013/053769A1 |
The invention relates to a multi-level sigma-delta Analog-to-Digital converter (200) comprising: a direct path (d1) having an input terminal (Id1) to receive an input analog signal (X) and an output terminal (Od1) to provide a output dig...
|
|
WO/2013/053659A1 |
The invention relates to a multi-level sigma-delta Analog-to-Digital converter 200 comprising: - a direct path (d1) having an input terminal (Id1) to receive an input analog signal (X) and an output terminal (Od1) to provide a output dig...
|
|
WO/2013/051641A1 |
The purpose is to provide a bandpass ΔΣ modulator for use at a desired frequency. A bandpass ΔΣ modulator is obtained by replacing z in the z region model of a low-pass ΔΣ modulator with z' below (in no event does θ0 = ±π/2×n, ...
|
|
WO/2013/048450A1 |
An inverter-driven resistor-ladder digital-to-analog (DAC) converter includes a resistor-ladder network that comprises a resistor for each bit signal of a multi-bit input signal. Each resistor of the resistor-ladder network comprises an ...
|
|
WO/2013/032443A1 |
An electronic apparatus comprises a first stage that functions as a single-ended to differential converter for signals in a low frequency range and a second stage that is electrically connected to the first stage and functions as a singl...
|
|
WO/2013/024789A1 |
As one embodiment of the present invention, provided is a drive circuit to which a three-value signal including a value representing zero is input, and that outputs two two-value signals that drive two drive elements such that the differ...
|
|
WO/2013/020987A1 |
A method for generating a digital signal (DS) from an analogue signal (IA, UA) generated by means of a frequency converter on the basis of a pulse width modulation, wherein the digital signal corresponds to a mean value for the analogue ...
|
|
WO/2013/015741A1 |
A reconfigurable analog-to-digital (ADC) modulator structure that includes a plurality of ADC structures being coupled to each other through their respective noise quantization transfer functions. Each ADC structure receives as input an ...
|
|
WO/2013/012390A1 |
A multi-input-multi-output-system (MIMO) is provided that includes a first input signal and a second input signal. A plurality of analog-to-digital converter (ADC) cell structures receive as input a combination of the first input signal ...
|
|
WO/2013/005267A1 |
This delta sigma modulator is provided with: a filter circuit (100) provided with an integrator which has an operational amplifier (104); a first adding circuit (120) which includes a first resistance element (201) connected between an o...
|
|
WO/2012/169161A1 |
A variable modulus sigma-delta modulator for a fractional-N frequency synthesizer in accordance with the present invention may include an integer division unit; a pulse-width modulation (PWM) generator, a sigma-delta noise-shaping unit, ...
|
|
WO/2012/164459A2 |
The invention refers to a system for sulfur (S) bioadaptation in a stable dispersion form for feeding industrial bioreactors, which are composed of: a) a tank with a liquid medium made up of a supernatant dilution or part of a sulfur oxi...
|
|
WO/2012/166821A2 |
A spike domain circuit responsive to analog and/or spike domain input signals. Has a hysteresis quantizer for generating a spike domain output signal z(t); a one bit DAC having an input coupled to receive the spike domain output signal z...
|
|
WO/2012/159653A1 |
An arrangement for reading out an analogue voltage input signal (Vin) comprises a voltage signal input (I) for applying the analogue voltage input signal (Vin) thereto, and reference means (ref) for generating an analogue reference volta...
|
|
WO/2012/153567A1 |
The present invention is provided with: a signal conditioner (105) which is provided with a plurality of output lines, and which outputs, to an output line which accommodates a range to which the level of an input signal belongs, a signa...
|
|
WO/2012/152906A1 |
A base band to frequency up-converter (1) is described wherein the base band to frequency up-converter (1) comprises a first input (201) for receiving a first base band signal of first base band samples and a second input (202) for recei...
|
|
WO/2012/153371A1 |
A delta-sigma A/D converter (10) comprises an integrator (102) having an operational amplifier (100) with an offset adjustment function, a quantizer (106) for digital conversion of output signals of the integrator (102), a feedback D/A c...
|
|
WO/2012/150621A1 |
A frequency synthesizer according to the present invention is provided with a decimal part data output unit (10) which generates two values for decimal part data (F, F+1) and outputs either one of the generated two values by switching ba...
|
|
WO/2012/139356A1 |
This invention is applied to signal processing field, and it provides a sigma-delta modulator, which comprises: a second gain amplifier, a third gain amplifier, a digital to analog converter, and sequentially connected subtracter, a firs...
|
|
WO/2012/141656A1 |
According to embodiments of the present invention, an analog-to-digital converter is provided. The analog-to-digital converter includes an input configured to receive an input signal, a feed-forward path connected to the input configured...
|
|
WO/2012/127579A1 |
The present invention provides a MASH sigma-delta modulator which comprises an integral unit having an M-stage parallel integration unit for performing integral operation in parallel with respect to N data inputted from an upstream unit ...
|
|
WO/2012/119922A1 |
A modulator (100) is provided in operative engagement with a sensor element (102) having a plurality of electrodes. The modulator (100) has a single-bit quantizer (110) electrically connected to a digital accumulator (107). The accumulat...
|
|
WO/2012/110796A1 |
An integrated-circuit, continuous-time, sigma-delta analogue-to-digital converter has a single-ended analogue input, a converter reference input, and a ground connection. The converter has a resistor-capacitor integrator arranged to rece...
|
|
WO/2012/106376A1 |
Certain aspects of the present disclosure relate to a technique for producing a difference value by offsetting a current value of an analog signal with a stored previous value of the analog signal, and generating a digital representation...
|
|
WO/2012/106395A1 |
An apparatuses for converting a continuous-time, continuously variable signal into a sampled and quantized signal includes an input line for accepting an input signal that is continuous in time and continuously variable, multiple process...
|
|
WO/2012/100437A1 |
Disclosed is a multi-bit delta-sigma modulator, which comprises an analog filter, an analog adder, a multi-bit quantizer, a digital loop filter, a multi-bit feedback digital-analog converter and a shunt feedback module. The shunt feedbac...
|
|
WO/2012/100105A1 |
A continuous-time sigma-delta analog-to-digital converter includes a first integrator stage to integrate a difference between a first differential signal derived from a differential analog input signal and a second differential signal de...
|
|
WO/2012/099723A1 |
An apparatus includes a clock source and an oversampled continuous-time digital-to-analog converter. Noise signal is added to the clock signal as the clock signal is generated and/or routed. The oversampled continuous-time digital-to-ana...
|
|
WO/2012/100106A1 |
A continuous-time sigma-delta analog-to-digital converter includes a plurality of integrator stages, in which one of the integrator stages includes a current buffer that drives an integrating capacitor. The analog-to-digital converter in...
|
|
WO/2012/093485A1 |
A signal modulation circuit (10) comprises an XOR (20) which monitors an input value (22), which is continuously input, and determines whether or not the input value (22) is contained in a prescribed range. In addition, the signal modula...
|
