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WO/2008/047928A1 |
It is an object to provide an element structure in which defects are not easily generated and a semiconductor device that has the element. An element has a structure in which a layer containing an organic compound is interposed between a...
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WO/2008/041285A1 |
In the deposition of an InGeSbTe film for constituting of a storage layer of phase change memory according to sputtering technique, the amount of electric discharge gas mixed in the InGeSbTe film can be reduced by the employment of a rar...
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WO/2008/035432A1 |
[PROBLEMS] To provide a semiconductor storage device wherein memory cells can be formed both in a simple structure and in a higher density. [MEANS FOR SOLVING PROBLEMS] The drain (18) of the selecting transistor (14) of each of memory ce...
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WO/2008/033332A2 |
A present method of fabricating a memory device includes the steps of providing a dielectric layer (110), providing an opening (1 12) in the dielectric layer (110), providing a first conductive body ( 116A) in the opening (112), providin...
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WO/2008/033203A1 |
A semiconductor chalcogenide containing memory device may be formed with a dielectric in close juxtaposition to a chalcogenide alloy. Because the dielectric includes material interface regions, the thermal conductivity of the dielectric ...
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WO/2008/030355A2 |
An apparatus, e.g. electrical switch includes a first solid electrode (14) on a substrate (12), a polyelectrolyte layer (18) over a part of the first solid electrode (14), a second solid electrode (16) on a portion of the polyelectrolyte...
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WO/2008/027209A2 |
A programmable resistance memory element and method of forming the same is described. The memory element includes a first electrode (14), a dielectric layer (21) over the first electrode and a second electrode (22) over the dielectric la...
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WO/2008/027278A2 |
A PCRAM cell has a high resistivity bottom electrode cap to provide partial heating near the interface between the cell and the bottom electrode, preventing separation of the amorphous GST region from the bottom electrode, and reducing t...
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WO/2008/026081A2 |
For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligne...
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WO/2008/027135A2 |
Phase change memory elements, devices and systems using the same and methods of forming the same are disclosed. A memory element (201) includes first and second electrodes (31, 32), and a phase change material layer (16) between the firs...
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WO/2008/027279A2 |
A PCRAM cell has a gradated or layered resistivity bottom electrode with higher resistivity closer to a phase change material, to provide partial heating near the interface between the cell and the bottom electrode, preventing separation...
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WO/2008/027163A2 |
A resistance variable memory cell and method of forming the same. The memory cell includes a first electrode and at least one layer of resistance variable material in contact with the first electrode. A first, second electrode is in cont...
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WO/2008/023637A1 |
A storage element is provided with a first electrode, a second electrode, and a resistance changing film (2) which is arranged between the first electrode and the second electrode to be connected with the both electrodes and changes a re...
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WO/2008/020961A1 |
A phase change memory element (100) and method of forming the same. The memory element includes a phase change material layer (24) electrically coupled to first (14) and second (22) conductive material layers. A energy conversion layer (...
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WO/2008/010290A1 |
A semiconductor device structured so that using, as memory element (RM) of a memory cell region, storage layer (52) of chalcogenide material capable of storing not only a high resistance state with high electrical resistance value but al...
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WO/2008/007481A1 |
Disclosed is a resistive memory device which has a relative high switching voltage and can achieve a relatively high resistance change ratio. The resistive memory device comprises an element (2) and counter electrodes (3,4) which are opp...
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WO/2008/001712A1 |
Typically provided is a switching element comprising a first insulating layer (1003) having an opening and made of a material for preventing the diffusion of metal ions, a first electrode (104) formed in the opening and containing a mate...
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WO/2008/002760A1 |
A method of forming devices is provided. A phase change layer is provided. The phase change layer is etched by providing an etch gas comprising a bromine containing compound and forming a plasma from the etch gas. The phase change layer ...
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WO/2008/001411A1 |
A memory layer of phase change memory consisting of a highly thermostable InGeSbTe film. This InGeSbTe film is formed by simultaneous sputtering of GeSbTe target (109a) of Ge2Sb2Te5 of stable composition and InTe target (109d) of In2Te3 ...
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WO/2007/148405A1 |
In a phase change memory, an interfacial layer is inserted between a calcogenide material layer and a plug. Covering of the whole interface of plug electrode by the interfacial layer is avoided. Formation of the plug above the calcogenid...
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WO/2007/146181A2 |
A method of operating a multi-terminal electronic device. The device includes an active material in electrical communication with three or more electrical terminals. The active material is able to undergo a transformation from-one-state-...
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WO/2007/145710A1 |
A phase change memory may be utilized in place of a dynamic random access memory in a processor-based system. In some embodiments, a chalcogenide material, used for the phase change memory, has relatively high crystallization speed so th...
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WO/2007/141865A1 |
In a memory array (MCA) formed by memory cells (MC) using a storage element (RQ) and a selection transistor (MQ) based on a variable resistance, it is necessary to reduce the resistance value of the storage element (RQ) immediately after...
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WO/2007/138703A1 |
A phase change memory is produced by forming a multilayer pattern on an insulating film (41) in which a plug (43) as a lower electrode is embedded. The multilayer pattern is composed of an insulating film (51) made of tantalum oxide, a r...
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WO/2007/126690A2 |
A phase change memory element and method of forming the same. The memory element includes a substrate supporting a first electrode. An insulating material element is positioned over the first electrode, and a phase change material layer ...
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WO/2007/126669A1 |
A nonvolatile memory cell includes a layer (118) of a resistivity-switching metal oxide or nitride compound, the metal oxide or nitride compound including one metal, and a dielectric rupture antifuse (117) formed in series. The dielectri...
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WO/2007/125674A1 |
Provided are a variable resistance element having a constitution, in which the area of an electrically contributable region of a variable resistor is smaller than the area defined by an upper electrode or a lower electrode, and a method ...
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WO/2007/127014A2 |
A memory may be implemented with a stable chalcogenide glass which is defined as a generally amorphous chalcogenide material that does not change to a generally crystalline phase when exposed to 200°C for 30 minutes or less. Different s...
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WO/2007/119733A1 |
[PROBLEMS] To fabricate a variable resistance element that is excellent as a capacitor-structured memory element. [MEANS FOR SOLVING PROBLEMS] A resistance layer (15) in an amorphous state is formed by keeping the resistance layer (15) a...
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WO/2007/116749A1 |
A nonvolatile memory element comprises a first electrode (2), a second electrode (6) formed above the first electrode (2), a variable resistive film (4) which is formed between the first electrode (2) and the second electrode (6) and who...
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WO/2007/114099A1 |
Disclosed is a switching device which is operated by utilizing an electrochemical reaction and comprises an ion conductive layer (54) which is capable of conducting metal ions, a first electrode (49) formed in contact with the ion conduc...
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WO/2007/110815A1 |
An electric device has an electrically switchable resistor (2') comprising a phase change material. The resistance value of the resistor can be changed between at least two values by changing the phase of the phase change material within...
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WO/2007/109021A1 |
Memory cells (200) for reduced power consumption and methods for forming the same are provided. A memory cell has a layer (205) of phase change material. A first portion (206) of the phase change material layer includes the programmable ...
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WO/2007/102341A1 |
Provided is a method for manufacturing a resistance-varying type element, which comprises the step of depositing a resistance-varying material (106) in such a manner in a contact hole formed in an inter-layer insulating layer (104) and h...
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WO/2007/099595A1 |
A semiconductor device with phase-change memory cell, including an interlayer insulating film of, for example, SiOF superimposed on a selection transistor superimposed on a major surface of semiconductor substrate; a chalcogenide materia...
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WO/2007/093190A1 |
The aim of the invention is to produce a contact region on a contact plane of a non-volatile memory cell with an extremely small surface area in an efficient and reproducible manner. To achieve this, a catalyst island (254) is first appl...
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WO/2007/086325A1 |
An electric element is provided with a first electrode, a second electrode and a variable resistive thin film connected between the first electrode and the second electrode. The variable resistive thin film includes Fe3O4 as a constituti...
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WO/2007/078664A2 |
A phase change memory element and method of forming the same. The memory element includes first and second electrodes. A first layer of phase change material is between the first and second electrodes. A second layer including a metal-ch...
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WO/2007/072308A1 |
The present invention discloses a vertical phase-change-memory (PCM) cell, comprising a stack of a bottom electrode (5) contacting a first layer of phase change material (14) , a dielectric layer (12) having an opening (13) , a second la...
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WO/2007/065264A1 |
A method of selecting fabrication parameters for an on-chip inductor of an integrated circuit. The integrated circuit includes a capacitor fabricated prior to the inductor. The capacitance of the capacitor is measured and, based on the m...
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WO/2007/062022A1 |
A layer of resistivity-switching metal oxide or nitride can attain at least two stable resistivity states. Such a layer may be used in a state-change element in a nonvolatile memory cell, storing its data state, for example a "0" or a "1...
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WO/2007/062014A1 |
Oxides of both nickel and cobalt have lower resistivity than either nickel oxide or cobalt oxide. Nickel oxide and cobalt oxide can be reversibly switched between two or more stable resistivity states by application of suitable electrica...
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WO/2007/057972A1 |
This invention provides a semiconductor device comprising a memory cell array and a semiconductor integrated circuit which are provided together on an identical semiconductor substrate (1). The memory cell array is provided in a memory c...
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WO/2007/058175A1 |
A memory cell region (mmry) is provided with a memory cell array wherein a plurality of memory elements (R) are arranged in matrix. The memory element has a chalcogenide material storage layer (22) for storing a high resistance status ha...
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WO/2007/053474A2 |
A phase change memory with higher column landing margin may be formed. In one approach, the column landing margin may be increased by increasing the height of an electrode. For example, the electrode being made of two disparate materials...
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WO/2007/046130A1 |
There is provided a technique that can increase the speed of a setting operation, which determines the speed of a write operation in a semiconductor device including memory cells using a phase-change material. The technique uses a means ...
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WO/2007/046883A1 |
A nonvolatile memory cell is described, the memory cell comprising a semiconductor diode (30). The semiconductor material making up the diode is formed with significant defect density between a bottom conductor (6) and a top conductor (2...
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WO/2007/046128A1 |
A nonvolatile memory device electrically writable is configured by an EEPROM (3), and a nonvolatile memory device not electrically writable is configured by an OTPROM (4a). Both the EEPROM (3) and the OTPROM (4a) are configured by phase-...
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WO/2007/034542A1 |
At the time of a setting action (SET) to set a phase changing element into a crystal state, for example, a pulse at a voltage (Vreset) necessary for melting the element is applied at first to the phase changing element, and a pulse at a ...
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WO/2007/026509A1 |
A variable resistance element comprises a variable resistor of strong correlation material sandwiched between two metal electrodes, and the electric resistance between the metal electrodes varies as a voltage pulse is applied between the...
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