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WO/2024/027887A1 |
With respect to particularly accurate measurements even at changing temperatures with structurally simple means, an integrated circuit (5) for signal processing of a sensor (2), wherein the sensor (2) is an inductively working sensor (2)...
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WO/2024/026584A1 |
Methods, systems, and devices for wireless communications are described. A first device may identify parameters for staircase encoding. The first device may perform a staircase encoding procedure on information bits in accordance with th...
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WO/2024/028692A1 |
The present invention concerns an oscillator (100) arranged to output a differential voltage oscillator carrier and comprising: - a tank circuit (20, 30), - an active circuit (10) connected to the tank circuit (20, 30), the active circui...
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WO/2024/028504A1 |
Disclosed is a recurrent DVR model and a DVR based recurrent neural network for generating a non-linear output signal. The recurrent DVR model includes a magnitude recurrent filter that comprises a recurrent neural network for combining ...
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WO/2024/029360A1 |
Provided is an elastic wave device capable of suppressing unwanted waves outside a pass-band and a transverse mode, and to suppress degradation of resonance characteristics.　This elastic wave device comprises a piezoelectric substrate ...
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WO/2024/029113A1 |
The high-frequency power supply device according to the present invention has a control unit that controls the output level of a synthetic output obtained by synthesizing the powers of the amplifier outputs of multistage power amplifiers...
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WO/2024/030149A1 |
This document describes methods implemented by and systems utilizing an alternating-current (AC) power-switching device. The AC power-switching device includes first and second current input/output (I/O) nodes, a current-limiting resisto...
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WO/2024/027920A1 |
The invention relates to method (100) for producing a surface acoustic wave, SAW, resonator device (200), the method (100) comprising: obtaining (110) an Yttrium Aluminum Garnet, YAG, layer (210); forming (120) an interleave layer (220) ...
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WO/2024/027733A1 |
A quartz resonator and a manufacturing method therefor, further relating to an electronic device. The quartz resonator comprises: a bottom electrode (40); a top electrode (30); and a quartz piezoelectric layer (10) disposed between the b...
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WO/2024/022865A1 |
A method comprising optimizing an input audio signal (s(n); u(t)) to obtain an optimized audio signal (S DNN (n); u DNN (t)) which produces a sound signal (110) having optimal perceived loudness.
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WO/2024/025473A2 |
An apparatus for filtering is disclosed that implements twin double-mode surface-acoustic-wave filters with opposite polarities and a geometric offset. The apparatus includes a first double-mode surface-acoustic-wave structure comprising...
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WO/2024/020768A1 |
The present disclosure relates to the technical field of communications, and provides a filter circuit, a filter and a manufacturing method therefor, and an electronic device. The filter circuit of the present disclosure comprises a firs...
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WO/2024/023591A1 |
Natural stone panel with an integrated touch capacitive sensing system for placing as a touch detection facade, in direct contact with a wall, comprising: a support natural stone tile; a printed sensing on said tile, comprising a plurali...
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WO/2024/024138A1 |
A short-circuit protection circuit according to the present invention is provided with: a voltage dividing circuit that divides a power supply voltage supplied from a power supply connected at one end; a semiconductor rectifying element,...
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WO/2024/023121A1 |
The invention relates to a method for synchronizing a time-measuring assembly comprising at least a first time-measuring device (1) and a second time-measuring device (2), which are connected to each other for radio signal transmission, ...
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WO/2024/022958A1 |
A Traveling Wave Parametric Amplifier (TWPA) transmission line with improved bandwidth includes one or more unit cell. Each unit cell includes a capacitor to a ground and a Josephson junction in series configured to provide inductance an...
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WO/2024/020675A1 |
A system, device and method are provided for reducing machine learning models for target hardware. Illustratively, the method includes providing a model, a set of training data, and a training threshold. A search space for reducing the m...
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WO/2024/022225A1 |
A radio frequency switching circuit which has high tolerance power, a chip and an electronic device thereof. The radio frequency switching circuit is composed of multiple stages of switching transistor units connected in series. In each ...
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WO/2024/022590A1 |
A data processing apparatus (100) is disclosed for compressing a neural network (200). The apparatus comprises a processing circuitry (101) configured to operate the neural network, wherein the neural network comprises a plurality of pro...
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WO/2024/021191A1 |
Provided in the present disclosure is an impedance calibration circuit, comprising: a calibration module, which is used for receiving a first calibration clock signal, performing impedance calibration on the basis of the first calibratio...
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WO/2024/022736A1 |
The present invention relates to a wireless end node, that comprises a Direct Sequence Spread Spectrum (DSSS) demodulator, wherein the DSSS demodulator is based on a double correlation algorithm, a data communications module configured t...
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WO/2024/023111A1 |
A signal processing circuit for a spiking neural network, comprising an interface for converting an analog input signal to a corresponding spike-time representation of the analog input signal. The interface comprises an analog-to-informa...
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WO/2024/026161A1 |
A multi-stage driver circuit (116) has a transmission line (119) coupled to an output of the multi-stage driver circuit (116). The transmission line (119) has inductive elements and programmable capacitive elements (130) selected to shap...
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WO/2024/026218A1 |
A pulse width modulator circuit (100) with circuitry (126) for providing first and second pulse width modulation signals (PWM_T_ SD; PWM_B_SD) with dead time periods between the first and second pulse width modulation signals, an input (...
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WO/2024/023429A1 |
The invention relates to a device (100) for controlling and protecting a power transistor (102), comprising: - a nominal switching circuit (103) for the transistor; - a short-circuit detection circuit (105) which keeps the transistor in ...
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WO/2024/022723A1 |
The invention relates to a method for preparing a single-domain thin layer (4) made of lithium-containing ferroelectric material. The method comprises providing a first single-domain layer (8) made of lithium-containing ferroelectric mat...
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WO/2024/023711A1 |
The present invention offers novel ways of achieving high degree of mechanical stress isolation and high accuracy of temperature sensing in quartz crystal resonators.
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WO/2024/023046A1 |
Systems and techniques that facilitate mitigating stray-coupling via multi-junction qubits are provided. In various embodiments, a device can comprise a first qubit having a plurality of Josephson junctions respectively between a plurali...
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WO/2024/020681A1 |
Methods for transferring a signal across an isolation barrier include encoding the signal according to at least first and second parameters at a second side of the isolation barrier and using one or more isolating device to transfer the ...
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WO/2024/021170A1 |
A level-shifting output buffer has cascode transistors with varying rather than fixed gate bias voltages. An adaptive regulator bypasses the I/O pad voltage to a regulator output when the I/O begins switching, but later clamps the regula...
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WO/2024/020746A1 |
A method and apparatus for processing FASTQ data, and an electronic device and a storage medium, which relate to the technical field of data processing. The main technical solution comprises: performing filtering processing on an origina...
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WO/2024/021831A1 |
Provided in the embodiments of the present application is a signal transmission circuit. The signal transmission circuit comprises a positive input end; a negative input end; and an amplification unit which is connected to the positive i...
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WO/2024/024614A1 |
A quartz crystal vibration plate 2 comprises an outer frame part 23 and a vibrating part 22 formed to be thinner than the outer frame part 23. A perforation 2a is formed between the outer frame part 23 and the vibrating part 22. The oute...
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WO/2024/020769A1 |
The present disclosure relates to the technical field of communications, and provides a bulk acoustic resonator and a preparation method therefor, and an electronic device. The bulk acoustic resonator of the present disclosure comprises ...
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WO/2024/023983A1 |
This connecting device comprises a first connecting unit that toggles between whether or not a first terminal and a second terminal are to be connected, and a second connecting unit that toggles between whether or not the first terminal ...
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WO/2024/022226A1 |
Disclosed are a radio-frequency switch circuit supporting a high-power mode, a chip, and an electronic device. The radio-frequency switch circuit is formed by connecting multiple stages of switch transistor units in series. In each stage...
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WO/2024/024334A1 |
The present invention provides a buffer circuit that can achieve a wide dynamic range while maintaining a low output impedance, and with which reduced circuit area and low power consumption can be attained. The buffer circuit comprises a...
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WO/2024/026006A1 |
The disclosure pertains to methods and apparatus for reporting channel state information (CSI) feedback in wireless telecommunication networks. In an example, a method implemented in a wireless transmit/receive unit (WTRU) may include re...
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WO/2024/021008A1 |
Embodiments of the present application provide a data processing method, device and system, and a storage medium. The method may comprise: performing compression encoding processing on collected first initial data to obtain first data; r...
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WO/2024/023577A1 |
Josephson junction based logic devices and methods for their use are described. An example Josephson junction based logic device includes a two-input OR/AND (OA2) gate. The OA2 gate includes a first input node inductively coupled to a fi...
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WO/2024/023479A1 |
A driver (300, 400) for driving a transducer has nodes for connection to high-side and low-side voltage supplies, an output node (301) and nodes (N1-N4) for connecting first and second capacitors (C1, C2). A network of switches is config...
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WO/2024/026054A1 |
In some examples, a circuit (104) includes a phase frequency detector (PFD) (206) having a first input, a second input, and an output. The circuit also includes a control circuit (208) having an input and an output, the control circuit i...
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WO/2024/024397A1 |
This damper comprises: a substrate; a metal component; a first surface-mounted component disposed on one surface of the substrate; a second surface-mounted component disposed on the other surface of the substrate; and a one-surface-side ...
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WO/2024/021538A1 |
The present application provides a high-low level conversion circuit. The circuit comprises a high voltage to low voltage module, a low voltage to high voltage module, a first target chip, and a second target chip; the low voltage to hig...
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WO/2024/024741A1 |
In a crystal oscillator 101, hermetic sealing is performed by sandwiching a crystal vibration plate 2, on which first and second excitation electrodes 221, 222 are formed, between first and second sealing members 3, 4 disposed above and ...
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WO/2024/023164A1 |
A comparator (10) comprises an input stage (IS), configured to receive a pair of input signals (S1, S2) to generate at least one differential current signal (S3). The comparator (10) further comprises an output stage (OS) configured to g...
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WO/2024/023244A1 |
A control device (1) for a plasma production system (100) is used to actuate an impedance-matching circuit (50) comprising an input terminal (50a) and an output terminal (50b). The impedance-matching circuit (50) is connected between a H...
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WO/2024/021912A1 |
The present application relates to the technical field of signal processing, and discloses a sample and hold circuit and a sample and hold method. The circuit comprises an input unit, track/hold switch units, and output units. The input ...
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WO/2024/026092A1 |
A spatially unrolled time domain (TD) architecture that includes an input and weight register having i inputs and j weights, where i corresponds with a number of delay lines for i neurons, and j corresponds with a number of processing el...
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WO/2024/021537A1 |
Provided in the present application are an offset voltage calibration circuit and method. The circuit comprises: a multi-stage amplifier; a gating switch, which comprises a plurality of switches each correspondingly connected to an outpu...
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