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JP3341845B2 |
A new high-speed digital interface for transmitting video information over various transmission media including terminated copper wires such as twisted-pair wires and fiber optical cable is described. The significance of this new interfa...
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JP2002319242A |
To enhance the density of a recording medium or transmission medium by increasing the encoding rate.When a p-bit input data word is converted into a q-bit (where q>p) code word by using a plurality of encoding tables and a code word sequ...
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JP3339336B2 |
To provide a DSV(digital sum value) control method and its device which appropriately perform data selection when the DSV control is performed for plural modulation data seqquences. A latch circuit 52 makes a DSV controllable flag that i...
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JP3339539B2 |
A digital modulation apparatus applies a method for converting data words to runlength-limited code words using plural conversion tables. The data words are converted to code words that significantly suppress the low frequency component ...
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JP3338181B2 |
PURPOSE: To obtain a code which is suitable to a high density recording and is excellent in an error propagation characteristic by replacing a data row in which 1 is continuous with the other data row in which 1 is not continuous by a th...
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JP2002304859A |
To insert a synchronous signal for decoding reproduction data into a string of the code words.A plurality of coding tables is used to convert an input data word of p-bits to a code word of q-bits (q>p), and a code word string obtained by...
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JP2002305557A |
To provide a serial data transmission method and a serial transmission circuit that transmit data at a transmission speed four times the conventional method without revising a reference clock frequency.The serial data transmission method...
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JP3334810B2 |
A modulating method and apparatus and a demodulating method and apparatus wherein high density recording can be achieved and a dc component can be controlled with a variable length channel code are disclosed. Recording data are divided i...
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JP3334121B2 |
To provide a transmitter/receiver with which handling is facilitated in the case of transmitting/receiving and decoding data and efficiency in encoding is improved when the same code bit is prevented from being generated continuously mor...
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JP2002533974A |
A device is disclosed for encoding a stream of databits of a binary source signal (S) into a stream of databits of a binary channel signal (C), wherein the stream of databits of the source signal is divided into n-bit source words (x1, x...
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JP2002533975A |
An encoding device encodes a stream of databits of a binary source signal into a stream of databits of a binary channel signal, wherein the stream of databits of the source signal is divided into n-bit source words, which device includes...
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JP2002271205A |
To provide a method with which redundant bits, whose DSV polarities can be inverted, can be surely inserted for each prescribed data word interval, after continuous binary data series is converted to input data words in units of four bit...
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JP2002261619A |
To obtain data encoding suppressing a low frequency component by eliminating need of heightening a clock frequency and using no regulation bit.When 12 bit data words are converted into 18 bit code words, the 12 bit data words are divided...
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JP2002262101A |
To provide facsimile equipment that can strictly discriminate intermingled compressed/non-compressed data with a simple configuration.The facsimile equipment converts read original image data into binary data and applies coding processin...
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JP3323065B2 |
To save energy, to reduce cost and to miniaturize the equipment by using a modulation signal having a sinusoidal signal component at least at a mark part of a transmission signal through the signal processing at an electric stage for the...
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JP2002527924A |
An apparatus is disclosed for generating a runlength limited (RLL) digital information signal, the digital information signal having a minimum runlength of d' and a maximum runlength of k', d' and k' being integers larger than zero and w...
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JP3319287B2 |
To provide a pre-coder which can perform pre-coding so that the same value is not continued for several bits or more (especially, the same value is not continued in an important part such as ID or the like) even if the same value is cont...
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JP3316313B2 |
An encoder includes a control bit insertion circuit (12) for inserting a control bit into input data, which is then subjected to I-NRZ modulation by a precoder (14) to generate a reference code. The reference code is given to a 4-code ge...
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JP2002230788A |
To provide an optical information recording medium of an L/R recording system which is capable of exactly demodulating the preformat information composed of wobble mark strings.Adjacent lands L2 and grooves g2 which are the same in the p...
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JP3311428B2 |
PURPOSE: To unnecessitate the recording of various ATF frequencies by forming a control signal to PROM and an ATF selection circuit from a word clock corresponding to a head switching signal. CONSTITUTION: A bit clock signal is outputted...
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JP3308758B2 |
PURPOSE: To exactly demodulate a transmission signal by demodulating a received signal to the digital signal of one bit corresponding to a regenerative clock signal by modulating the digital signal of one bit at a first exclusive OR gate...
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JP3306271B2 |
To execute superior information language conversion in a detection window width and min. magnetic reverse interval, etc., by encoding, etc., for selecting a conversion table converting an m-bit information language into an n-bit code wor...
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JP2002522870A |
A digital data recording channel which uses variable rate encoding. The encoder monitors an input bit stream for sequences associated with selected readback characteristics, and inserts one or more bits where desirable to improve the cha...
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JP3304752B2 |
To demodulate modulation data with a wide allowable margin dynamically with respect to pulse width distortion of high frequency data only when the frequency of the modulation data changes from a low frequency into a high frequency. This ...
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JP3305344B2 |
PURPOSE: To reproduce medium information with high line recording density by providing a data conversion table and composing a pattern after conversion of at least one '0' and an even number of successive '1's. CONSTITUTION: The pattern ...
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JP3302368B2 |
A system for determining the data bits represented by the received symbols of one or more data constellations includes converting the received symbols into multi-bit values (preferably in two's complement form), selecting a number of the...
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JP3299387B2 |
PURPOSE: To hardly receive influence by an input threshold voltage fluctuation by the manufacture process of a circuit element and to reduce a through-current in an input circuit accompanying the reduction of the number of the input circ...
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JP3297242B2 |
PURPOSE: To provide a pulse width modulator(PWM) which can directly accept data from the bus of a data processor in a simple configuration according to input data of two's completion. CONSTITUTION: A PWM 20 receives a two's complement in...
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JP2002185399A |
To obtain a radio communication system in which the signal from any one of remote units being received by a base unit is prevented from having an undue power or governing other unit.Transmission power of the remote unit is controlled acc...
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JP2002185999A |
To solve a problem that a communication link between a base unit and one or more remote units is easily interrupted since a frequency selected for an operation is easily interfered from other RF generating sources such as a microwave dev...
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JP2002186049A |
To provide a wireless communication system that encodes two kinds of digital signals.This invention discloses a method for encoding two kinds of the digital signals (USC-B, UBS-B). Each of the digital signals is characterized in a bit st...
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JP3294936B2 |
PURPOSE: To realize a channel signal in a form of a (d, k) sequence by an additional technique for providing a device which encodes an n-bit source word to an m-bit channel word, to prevent the occurrence of a DC component in a channel s...
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JP3288259B2 |
To provide a ternary signal input circuit which can be simplified in circuit configuration and can reduce the circuit area on a chip when the circuit is constituted in an LSI. A ternary signal input circuit is constituted only of digital...
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JP2002141804A |
To minimize entire circuit scale by minimizing the number of tables to be used for encoding and decoding.This device is provided with basic tables of 2220 ways less than the 16th power of 2, a reference table having data bit information ...
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JP3281724B2 |
PURPOSE: To provide a pair deciding circuit for biphase signal with which the data pair of biphase signals can be decided at high speed and malfunction caused by the influence of noise is suppressed. CONSTITUTION: The biphase signal is i...
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JP3279869B2 |
PURPOSE: To reduce a bit error rate of receive data by performing correct comparison of received pulses and taking countermeasures against noise even when a peak of an AMI code fluctuates in the reception circuit of an AMI code. CONSTITU...
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JP3277430B2 |
PURPOSE: To enable the high-density recording of the recording medium, to improve the error rate and to easily define data in the case of the Vitabi demodulation. CONSTITUTION: An 8-10 modulator 10 converts data into a code by using the ...
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JP3274781B2 |
PURPOSE: To attain a simple circuit constitution by deciding the reference signal point level that has the least difference from the n-value reference signal point as a symbol code and then selecting the symbol code that has the least di...
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JP2002096503A |
To obtain a multichannel pulse width modulator in which operational reliability can be prevented from lowering due to simultaneous rising of PWM signals.When a PWM signal 48m is generated from PWM generators 50m (m=1-M), where M is the n...
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JP2002091569A |
To easily compose a positioning system which uses plural absolute sensors.In this positioning system 1, the detection signal of every absolute sensor 3 is fetched by a personal computer 5 constructing a controller via a PC card 6. The ca...
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JP2002509325A |
A system and method described for avoiding catastrophic error sequences in a media code sequence of symbols for data storage on a storage medium according to EPRML. The system and method includes modulation encoding user data which is to...
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JP3268350B2 |
To provide the bipolar unipolar conversion circuit whose threshold voltage is set and adjusted to be several hundred mV or below by recognizing a permissible range of an input amplitude of a comparator of a next-stage adopting a low powe...
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JP3264668B2 |
A code signal representing a sequence of code symbols carrying digital information is generated with the frequency components of the code signal being essentially confined to a preselected signalling band lying within the bandwidth of an...
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JP3264925B2 |
A method to encode two digital signals (USC-B, UBC-B) is disclosed. Each of the digital signals is characterized by a bit stream. An N bit block from the first signal is mapped to a unique M bit third signal where M is greater than N. Fu...
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JP2002507075A |
A variable aperture coding/decoding system suitable for use in a spread spectrum system provides multiple phase coding of an input NRZ bitstream. Each bit of a coded output signal is coded to encompass a predetermined different number of...
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JP3261085B2 |
To realize efficient and accurate decoding by using a structure on which a symbol having been coded depends in the case of detecting a symbol series from a sample received from a noisy channel. A code word includes a set of partial word ...
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JP2002505540A |
(57) [Summary] The detector (400) of the present invention is provided to detect a data value using a data signal sampled to give a time-separated data sample. The first detector portion (462, 452, 458) is configured to determine the pos...
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JP3258022B2 |
A data frame structure for a digital information signal comprises a first fixed number of repetitive data segments each containing a second fixed number of M-level symbols representing a plurality of data bytes and a data segment sync ch...
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JP3255341B2 |
To improve transmission efficiency by allowing an integration section to integrate received pulses with respect to a high level period in a demodulation state of a PLL circuit, converting the pulse width into a voltage and latching the v...
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JP2002044664A |
To provide a run length limited(RLL) encoding method and encoder for increasing the data recording density in a high density optical storage system.The RLL encoder comprises a first shift register for storing 2 bit updated subsequent inp...
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