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JP2940505B2 |
To eliminate a need of producing a decoder again regardless of the change of a bus driver/receiver to be connected. This equipment is set in each of plural apparatus provided in a structure, and these equipments are connected to a bus th...
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JP2939185B2 |
To enhance the efficiency of an eight-to-fourteen modulation(EFM) with a simple configuration. Received m-bit data are coded by a channel code in (n-d+1)bit. An (n-d)th bit of a 1st channel code and a (d+1)th bit of a 2nd channel code in...
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JPH11509376A |
PCT No. PCT/FR95/01020 Sec. 371 Date Aug. 27, 1997 Sec. 102(e) Date Aug. 27, 1997 PCT Filed Jul. 28, 1995 PCT Pub. No. WO96/04739 PCT Pub. Date Feb. 15, 1996To decode a multivalent electrical signal capable of taking up a number n of sta...
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JPH11225074A |
To provide a decoder with a simple circuit configuration where an f/2f-coded modulation signal is used to demodulate a base band signal. This decoder is provided with a shift register 1, a pattern detection circuit 2, and a flip-flop 3. ...
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JP2934385B2 |
A modulation circuit for a digital signal recorder includes first and second high-pass filters for removing the direct current component in the output of the coded I and Q channels and for converting a 4-levels signal into a 7-levels sig...
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JP2933872B2 |
To enable long-distance transmission, while reducing a baud rate by transmitting paired signals having (n) number of binary bits, while respectively encoding them to code words having (n-1) number of ternary trits in case of data transmi...
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JP2929888B2 |
PURPOSE: To make a delay time uniform due to a signal line and obtain uniform time resolution by setting signal line load capacitance to which plural delay elements are connected equivalent. CONSTITUTION: The NOT AND circuit NAND which i...
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JPH11205397A |
To provide the wireless communication equipment by which communication with high reliability is attained without increasing redundant bits. An infrared raypulse train is converted into an electric signal by a light receiving section 42 a...
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JP2924418B2 |
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JP2922297B2 |
An improved decoder circuit suitable for decoding an encoded binary data stream. The encoding is expected to generate a three-part code format, the format, in turn, comprising a pair of clock transitions that set-off a data transition. T...
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JPH11185398A |
To provide a method for encoding/decoding a PRML code for a high density data storage equipment by enhancing an encoding rate affecting a channel input SNR, improving recording/reproducing of the data, making the encoding rate a specifie...
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JPH11186993A |
To perform transmission through an optical fiber of a narrow pass band by block-encoding a binary code of a specified but width, converting it into the binary code of a specified bit width larger than that, furthermore converting it to a...
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JPH11177638A |
To permit conversion from a Manchester code to an NRZ code while using a clock reproduced without using a PLL circuit. The Manchester code is exclusively ORed by a 2:1 signal selector circuit 2 and a second exclusive OR circuit 4 while s...
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JP2911465B2 |
A transmitter for converting a binary digital signal into a pseudo-ternary signal at first and second output nodes (40, 41) to form differential output voltages includes a current source amplifier circuit (10), a first voltage source amp...
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JP2911748B2 |
A Manchester code signal is used as a communication signal to be superimposed onto an operating current. The amplitude value in the plus direction with respect to an average current value is made larger than that in the minus direction, ...
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JP2911599B2 |
The aim of the invention is to obtain, using digital circuit means, from a binary signal a control quantity (G) which indicates whether the binary signal contains a wanted signal or merely an interference signal. In a first stage (24), t...
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JP2908254B2 |
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JP2904285B2 |
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JPH11154984A |
To provide a communication equipment, its communication system and method, and its coding/decoding method where data are transmitted at high speed for a long distance regardless of its compactness. A coding circuit 12 of a transmission u...
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JPH11150479A |
To obtain a pulse width signal conversion circuit with which a pulse width signal is uniformly and surely converted. A load signal generating circuit 102 generates a timing pulse, that specifies a count period by a period equivalent to t...
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JPH11136295A |
To reduce a bit length of a frame synchronizing signal and to eliminate restriction of a data pattern by replacing a synchronization flag in precedence over biphase data with a non-change part by 2 clocks at a transmitter side and sendin...
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JP2891535B2 |
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JP2887227B2 |
A method and an apparatus are provided for generating an (4,20) RLL modulation code having a decreased detectible window width and an increased recording density ratio. The code's spectrum is concentrated in the low-frequency band, there...
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JP2886214B2 |
Means and structure for encoding binary data ensures that, on average, the encoded data provides a balanced data stream having an equal number of logical one and logical zero bits. An indicator bit of known value is appended to N data bi...
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JPH11110921A |
To shorten the maximum reversing interval and a contraint length without lowering a coding rate by encoding input data so that code strings to be obtained by limiting same codes which start from odd-numbered or even- numbered channel clo...
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JPH11112331A |
To provide improvement for providing many options or extended ternary encoding by performing the extended ternary decoding of a ternary input signal in response to the output signal from a window comparator output in both phases. When a ...
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JP2883525B2 |
PURPOSE: To facilitate the evaluation of line quality by providing a detection section detecting whether a number of bipolar pulses in existence between a violation code being a B3ZS code rule and its succeeding violation code is an even...
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JP2881883B2 |
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JPH1198844A |
To make a signal of an equivalent vector and switching timing coincide with specified values. The AC current polarity of each phase is obtain by a first means 7. In order to prevent arm short-circuit, a non-overlapped period is set by a ...
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JPH1168860A |
To provide the data transfer device that suppresses noise produced by data transfer and is realized by having only to add a simple circuit to an existing circuit. Input data IN0, IN1, IN2 and IN3 are given to coding circuits 100- 0, 100-...
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JP2864529B2 |
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JPH1155123A |
To constitute an analog phase comparator, without the use of a differential circuit and a full rectifier circuit, even in an optical transmission system which uses non-return to zero(NRZ) data signals. A data input terminal and a clock i...
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JPH1155228A |
To provide a reduced-cost transmitter, receiver, and transmitter/ receiver with a simple configuration to deal with fading or interference waves. In a receiver 2, #1 and #2 demodulating circuits 22 remove carrier wave components having a...
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JP2862076B2 |
A horizontal period counter 3 determines one bit period of bi-phase codes by measuring the period of a horizontal scan line immediately preceding one containing bi-phase codes to be decoded. An edge pulse generator 6 generates edge pulse...
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JPH1141301A |
To substantially attain high speed date transmission even when the speed limit of a device is present by providing a means for driving a light emitting element by a multilevel signal, and transmitting it as an optical signal, and a frequ...
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JP2856190B2 |
Disclosed is a data processing equipment for conducting the whitener encoding to suppress DC bias in transmit data in a communication device, which has: a multiplexer which parallel-to-serial-converts transmit data and a scrambler which ...
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JP2852932B2 |
The present invention provides a timing recovery technique for baseband-coded data sequences which applies to line codes with inband timing information embedded in periodic signal transitions, such as zero-crossings. The technique utiliz...
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JPH1127117A |
PURPOSE: To allow the demodulator to have a high processing speed, high accuracy and bipolar performance by designing the circuit of the demodulator so that a sum of a voltage nearly equal to a mean DC voltage of an output waveform of a ...
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JP2851076B2 |
A high bit-rate serial communications link encodes data by inserting non-data 0's and 1's. These extra bits are removed by a decoder at the receiving end of the link. Transmission of data can be made along optical fibers.
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JPH1117744A |
To reduce errors by detecting an impossible pattern continuing '1', and correcting the pattern into correct pattern not continuing '1' when pulse wide modulation(PWM) demodulation is performed to the PWM modulated data string of code str...
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JP2848623B2 |
For a binary-to-ternary converter fed from a standard TTL supply of 5 V +/- 5%, a minimum 4.75 V supply voltage is available. According to the amplitude requirement of the CCITT Recommendation G703, the positive and negative output pulse...
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JP2844806B2 |
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JPH114264A |
To provide a digital signal identification circuit of a differential system, which executes A/D conversion with a precise sampling clock and which can execute precise decoding. An integration equalizer 1 Nyquist-equalizes a video reprodu...
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JP2842251B2 |
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JPH10341161A |
To acquire the DC voltage that is proportional to a PDM code even when the specific pulse width exceeds the specific duty cycle value by using a pulse density modulation means which receives the parallel digital signals and outputs the s...
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JP2839868B2 |
A method is presented, for encoding a five bit word into a four symbol ternary word. Forty eight ternary words are divided into three groups, each of sixteen codewords, such that the Hamming distance between any two, distinct words in a ...
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JP2837136B2 |
A control signal generation apparatus for use in a digital information signal recording system enables an optimum channel word of two channel words output from two precoders to be recorded on a digital record medium. The control signal g...
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JP2834170B2 |
In a system for transmitting a binary source signal from a data transmitter to a data receiver through a noisy dispersive channel, the data transmitter comprises a sliding block encoder which converts the binary source signal at a given ...
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JP2834182B2 |
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JP2833862B2 |
A collision detection method and apparatus is disclosed for detecting code rule violations in Manchester encoded data packets. The signals delta 0=S2n-S2n-1 delta 1=S2n+1-S2n delta 2=S2n+1-S2n-1 sigma 0=S2n+S2n-1. are determined at time ...
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