| Document |
Document Title |
|
WO/2023/157658A1 |
A silicon carbide epitaxial substrate that has a silicon carbide substrate and a silicon carbide layer positioned on the silicon carbide substrate. The silicon carbide layer includes a first region and a second region that is surrounded ...
|
|
WO/2023/157330A1 |
Provided is a semiconductor device comprising: a first conductivity type drift region provided on a semiconductor substrate having a front surface and a reverse surface; and a first conductivity type or second conductivity type reverse-s...
|
|
WO/2023/158689A1 |
Semiconductor devices and methods of manufacturing the same are described. The method includes forming a diffusion break opening on the backside and filling with a diffusion break material to service as a planarization stop. In some embo...
|
|
WO/2023/156875A1 |
Provided is a semiconductor device that enables miniaturization and high integration. This storage device has a first transistor, a second transistor, a first capacitor, and a second capacitor. The first capacitor has a first electrode a...
|
|
WO/2023/157495A1 |
This nonvolatile storage device comprises: a first memory cell; first wiring laminated on the first memory cell, the first wiring extending in a first direction and being electrically connected to the first memory cell; second wiring lam...
|
|
WO/2023/157620A1 |
The present disclosure relates to an electronic apparatus and a solid-state imaging device that make it possible to suppress the gate capacity in a transfer transistor having a vertical gate electrode structure. The solid-state imaging d...
|
|
WO/2023/156883A1 |
Provided is a semiconductor device that enables miniaturization and high integration. This semiconductor device has a memory cell including first to third transistors and a capacitor. The second and third transistors share a metal oxide....
|
|
WO/2023/155585A1 |
The present disclosure relates to an insulated gate bipolar transistor and a manufacturing method therefor, an electronic device and a storage medium. The structure of the insulated gate bipolar transistor manufactured by means of the ma...
|
|
WO/2023/157400A1 |
Provided is a spatial light modulator capable of miniaturizing cell size and reducing the loss associated with the miniaturization. A spatial light modulator (SLM) is equipped with: a plurality of microcells (C) with a cell size of less ...
|
|
WO/2023/156877A1 |
Provided is a semiconductor device that enables miniaturization or high integration. The semiconductor device comprises a first memory cell, a second memory cell on the first memory cell, a first conductor, and a second conductor on the ...
|
|
WO/2023/157452A1 |
A nitride semiconductor device (10) includes an electron transit layer (16), an electron supply layer (18), a gate layer (22) containing acceptor impurities, a gate electrode (24), a passivation layer (26), a source electrode, a drain el...
|
|
WO/2023/157626A1 |
A semiconductor device according to the present invention comprises: a semiconductor layer; a first wiring line and a second wiring line, which are formed on the semiconductor layer; an insulating layer that has a first opening from whic...
|
|
WO/2023/155917A1 |
Disclosed in the present application are a double-gate transistor, a pixel driving circuit and a display panel. The double-gate transistor comprises: a first gate electrode, a first electrode and a second electrode, wherein the first gat...
|
|
WO/2023/157048A1 |
In the present invention, a first insulating layer 1 is on a substrate 40, a first metal wiring layer 2 and a fourth metal wiring layer 3 are embedded in the insulating layer, a second metal wiring layer 4 abuts the metal wiring layer 2 ...
|
|
WO/2023/157627A1 |
[Problem] To provide a comparator, a light detection element, and an electronic apparatus in which noise can be reduced. [Solution] Provided is a comparator that compares a signal with a reference signal to output a comparison result, th...
|
|
WO/2023/157972A1 |
This silicon carbide semiconductor substrate comprises: a first-conductive type silicon carbide semiconductor substrate (1); a first-conductive type first semiconductor layer (2) having an impurity concentration lower than that of the si...
|
|
WO/2023/156158A1 |
The present invention relates to a transistor (10), in particular a wide bandgap semiconductor power transistor (40), comprising an epitaxial layer (11) of a first conductivity type, at least one well region (13) of a second conductivity...
|
|
WO/2023/158934A1 |
A die includes fins extending in a first direction, a gate formed over the fins, the gate extending in a second direction that is perpendicular to the first direction, a first source/drain contact layer formed over the fins and extending...
|
|
WO/2023/152586A1 |
Provided is a semiconductor device that is configured to allow miniaturization and high integration. This semiconductor device includes a memory cell including first to third transistors and a capacitor. The first to third transistors ea...
|
|
WO/2023/151133A1 |
A memory cell structure, a memory array structure, a semiconductor structure and a manufacturing method therefor. The memory cell structure comprises a substrate, an active region, a word line structure, an insulating dielectric layer an...
|
|
WO/2023/152588A1 |
Provided is a semiconductor device capable of achieving a high-integrated or minute arrangement. In the present invention, a first transistor and a second transistor both have, in a shared manner, a first metal oxide disposed on a first ...
|
|
WO/2023/153027A1 |
Provided is a highly reliable semiconductor device that has low conduction loss and switching loss, and that can achieve an increase in turn-off cut-off resistance. The semiconductor device comprises a switching gate and a carrier contro...
|
|
WO/2023/152595A1 |
Provided is a storage device that enables miniaturization or high integration. Provided is a storage device comprising a memory cell which includes a transistor and a capacitive element, a first insulator, a second insulator on the first...
|
|
WO/2023/153154A1 |
Provided is a group III element nitride semiconductor substrate having a first surface and a second surface, and capable of suppressing variations in the characteristics of an element formed on the substrate. A group III element nitride ...
|
|
WO/2023/153065A1 |
According to the present invention, a magnetoresistance effect laminate is formed by layering, in order, a fixed magnetization layer that has a magnetization that is fixed in a constant direction that is parallel to the layering directio...
|
|
WO/2023/151690A1 |
The present application provides a field effect transistor and a preparation method therefor, and relates to the technical field of semiconductor devices. The method comprises: providing a first device structure comprising a substrate an...
|
|
WO/2023/154636A1 |
In one general aspect, an apparatus can include a substrate (110, 410) having a semiconductor region (112, 122), and a trench (10, 40) defined in the semiconductor region and having a sidewall. The apparatus can include a shield electrod...
|
|
WO/2023/151889A1 |
A semiconductor device including a first nanosheet device located on a substrate. The first nanosheet device includes a first plurality of nanosheets (115) and each of the first plurality of nanosheets are surrounded by a first dipole. T...
|
|
WO/2023/154155A1 |
A memory structure including three-dimensional NOR memory strings and method of fabrication is disclosed. In some embodiments, a memory structure includes randomly accessible ferroelectric storage transistors organized as horizontal NOR ...
|
|
WO/2023/153286A1 |
In order to provide a spatial light phase modulator that can be miniaturized and that is operable at high speed, each microcell (C) of this spatial light phase modulator (13) is composed of a magnetization free layer (C11) and a control ...
|
|
WO/2023/154046A1 |
A semiconductor device is provided including two or more termination units. Each termination unit can include a via channel, a connection via, floating field rings, a metal plate, and a floating field plate. The floating field rings may ...
|
|
WO/2023/154078A1 |
A method of forming a device on a semiconductor substrate having first, second, third and dummy areas, includes recessing the substrate upper surface in the first, second and dummy areas, forming a first conductive layer over the substra...
|
|
WO/2023/152814A1 |
[Problem] To electrically connect a lead layer and a protective film reliably even when the film thickness of a protective film that covers a functional film is extremely thin. [Solution] After the conductive protective film 51 is formed...
|
|
WO/2023/153091A1 |
The present invention achieves high integration and improves noise resistance. A semiconductor device according to the present invention comprises first and second field effect transistors. Each of the first and second field effect trans...
|
|
WO/2023/154510A1 |
A method of fabricating a heterostructure includes growing epitaxially, in a growth chamber, a first semiconductor layer of the heterostructure, the first semiconductor layer including a first III-nitride semiconductor material, the firs...
|
|
WO/2023/153138A1 |
Provided is a wave control device that can improve the controllability of electromagnetic waves. A wave control device according to the present technology comprises a metamaterial and a magnetic material. In view of the wave control de...
|
|
WO/2023/153131A1 |
[Problem] The present invention addresses the problem of: achieving a large On-state current with use of an indirect transition semiconductor; and suppressing variation in the electrical characteristics among elements. [Solution] The pre...
|
|
WO/2023/151950A1 |
A stacked semiconductor device includes a lower semiconductor device that has a backside and includes a flipped upper semiconductor device that has a backside that is opposed to the lower semiconductor device backside. The flipped upper ...
|
|
WO/2023/153509A1 |
The present invention comprises: first gate insulation layer 21 which is provided with a flat part that follows a flat surface of a flexible base 11 and a step part 22 that covers a gate electrode layer 12 and that protrudes from the fla...
|
|
WO/2023/149336A1 |
This semiconductor device 100 comprises a semiconductor substrate 110, a plurality of trenches 120, a gate insulation film 122, a gate electrode 124, an interlayer insulation film 130, and a surface electrode 140. The semiconductor subst...
|
|
WO/2023/148015A1 |
A MOSFET includes a semiconductor substrate, which has a body and an upper layer. The upper layer is doped differently than the body. The body and the upper layer are of a same crystal structure and orientation. The MOSFET also includes ...
|
|
WO/2023/150492A1 |
A power semiconductor device includes a semiconductor layer structure comprising a drift region of a first conductivity type, and first and second contacts on the semiconductor layer structure. The drift region comprises a wide bandgap s...
|
|
WO/2023/149636A1 |
A perovskite composite comprising antimony trifluoride, an electronic element comprising same, and a preparation method therefor are disclosed. The perovskite composite comprises tin (Sn)-based perovskite and antimony trifluoride (SbF3) ...
|
|
WO/2023/149131A1 |
According to the present invention, a p-type impurity concentration profile (41) in the depth direction of a p-type base region is controlled by means of ion implantation into the p-type base region in two or more stages. The ion implant...
|
|
WO/2023/149105A1 |
According to the present invention, a wiring line 31 and a wiring line 32 of a display device DSP2 each comprise: a metal wiring part 30A which is formed of a first metal material that is copper or a copper alloy; and a metal wiring part...
|
|
WO/2023/150021A1 |
A device includes a first plurality of MEOL interconnects coupled to a second node that extends in a first direction. The first plurality of MEOL interconnects includes first and second subsets of MEOL second-terminal interconnects. The ...
|
|
WO/2023/149187A1 |
The present disclosure relates to a vertical transistor, a light detection device, and an electronic apparatus that make it possible to obtain improved transistor characteristics in a vertical transistor. This vertical transistor is prov...
|
|
WO/2023/148196A1 |
The present invention relates to a non-volatile field-effect transistor (10), comprising: - a gate electrode including a first contact (C1); - a source (14) comprising a second contact (C2); - a drain (16) including a third contact (C3);...
|
|
WO/2023/148574A1 |
Provided is a semiconductor device that enables miniaturization and a high level of integration. The semiconductor device has: a memory cell having a transistor and a capacitive element; a first insulator; and a second insulator on the f...
|
|
WO/2023/149447A1 |
The present invention addresses the problem of providing an etching solution composition that imparts a good etched surface shape to a metal to be etched at a controlled etch rate. The present invention relates to an etching solution c...
|
