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Patent Searching and Data


Matches 701 - 750 out of 855,011

Document Document Title
WO/2017/179870A1
A car audio output control device and a method therefor are disclosed. The control device stores, in advance, an identification code for each output mode with respect to a plurality of output modes and receives a device acoustic source a...  
WO/2017/173570A1
A method and a system for music control in a home. The method comprises the following steps: acquiring the position of a user (101); controlling, according to the position of the user, the volume of music in the home (102); receiving adj...  
WO/2017/175392A1
The purpose of the present invention is to achieve a system for solving a row hammer issue without significantly increasing a DRAM chip area. A semiconductor storage device comprises: a memory unit including a plurality of memory cells; ...  
WO/2017/174979A1
A storage bitcell comprising a first inverter cross-coupled with a second inverter, both the first and second inverter being in a path between a first potential and a second potential; wherein a first isolator is connected in the path be...  
WO/2017/175580A1
This optical recording medium is provided with: two or more recording layers; and a light irradiation surface that is irradiated with light for recording information signals in the two or more recording layers. At least one layer other t...  
WO/2017/174527A1
The invention relates to an electronic memristive component that has a complementary analogue reconfigurable memristive bidirectional resistor interrupter. The component has a memristive layer sequence having a BFTO/BFO/BFTO three-ply la...  
WO/2017/176467A3
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric capacitor of a memory cell may be in electronic communication with a sense capacitor through a digit line. The digit line may...  
WO/2017/175682A1
The present invention is a glass plate constituent in which the loss factor is 1×10-2 or more and the longitudinal wave sound velocity value in the plate thickness direction is 5.5×103 m/s or more.  
WO/2017/175264A1
Provided is a magnetic tape storage apparatus capable of reliably storing a magnetic tape having data recorded therein and thus reliably storing the data recorded therein, in a small space, for a long period of time, by means of a simple...  
WO/2017/173818A1
A shift register circuit having a pull-down drive sub-unit providing a first pull-down signal to a pull-down node (PD); a first pull-down sub-unit connected to the pull-down node (PD), a pull-up node (PU), and an output port (OUT), the f...  
WO/2017/176425A1
The present disclosure includes apparatuses and methods related to refresh circuitry. An example apparatus can include a memory array including a main portion and a redundant portion. The apparatus can include refresh circuitry configure...  
WO/2017/176467A2
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric capacitor of a memory cell may be in electronic communication with a sense capacitor through a digit line. The digit line may...  
WO/2017/176217A1
Various embodiments may provide a circuit arrangement. The circuit arrangement may include a first and a second memory element each having a first electrode and a second electrode, a first access transistor having a first controlled elec...  
WO/2017/172008A1
An apparatus for time aware audio streams is described herein. The apparatus includes a converter and an alignment unit. The converter is to perform sample rate conversion of data from a first clock to a second clock. The alignment unit ...  
WO/2017/171773A1
In an example, a method includes receiving input data and dividing the input data into a plurality of data portions, wherein the size of each data portion is based on a significance level. The input data may be assigned to at least one r...  
WO/2017/172221A1
A solid state drive includes a controller with a hardware interface to fewer planes of memory cells than included in the nonvolatile storage. For example, a controller hardware interface can include a 1N plane interface coupled to a nonv...  
WO/2017/170978A1
Provided is a data structure that makes it possible to easily understand a relationship between pre- and post-editing moving image data on a frame-by-frame basis. A data file has an area for moving image data, and an area, different from...  
WO/2017/173042A3
The present invention relates to utilizing individually addressable nanostructure arrays as nano electrodes for multianalyte electrochemical sensing via utilizing various electrochemical spectroscopy, capacitive and field emission techni...  
WO/2017/172302A1
Circuitry and methods are disclosed for accurately measuring a latency of a data path through multiple FIFO buffers (FIFO 1 and FIFO 2) on separate semiconductor dies (Die 1 and Die 2). A base latency of each FIFO may be measured by meas...  
WO/2017/172346A1
According to one embodiment of this disclosure, an apparatus is disclosed. The apparatus includes a voltage regulator configured to produce a regulated voltage, a plurality of current circuits coupled in parallel between an output node a...  
WO/2017/169169A1
To improve ventilation efficiency, while suppressing exposure of a component disposed inside of an electronic apparatus. An electronic apparatus (1) has a first blocking section (H1) and a second blocking section (H2), which are disposed...  
WO/2017/170340A1
The present invention provides a memory device with which it is possible to promote optimization of power consumption and read out reference data. This memory device 100 is provided with a memory area 113 in which is stored reference dat...  
WO/2017/171820A1
An embodiment includes an apparatus comprising: first and second electrodes; first and second insulation layers between the first and second electrodes; and a middle layer between the first and second insulation layers; wherein (a) the m...  
WO/2017/172072A1
Systems and methods for improving performance of a non-volatile memory by utilizing one or more tier select gate transistors between different portions of a NAND string are described. A first memory string tier may comprise a first set o...  
WO/2017/172230A1
Leakage-aware activation control of a delayed keeper circuit for a dynamic read operation in a memory bit cell is disclosed. In one aspect, a leakage-aware activation control circuit is provided for a dynamic read circuit configured to p...  
WO/2017/168119A1
According to one embodiment of the present disclosure, a circuit is provided. The circuit includes a first logic circuit, a second logic circuit, and a Correlated Electron Switch, herein after termed CES, element. The CES element is conf...  
WO/2017/171866A1
One embodiment provides an apparatus. The apparatus includes a bipolar junction transistor (BJT) and an integrated resistive element. The BJT includes a base contact, a base region, a collector contact, a collector region and an integrat...  
WO/2017/172209A1
Embodiments include apparatuses, systems, and methods including a memory apparatus including a plurality of bit cells, wherein each of the plurality of bit cells correspond to a respective weight value and include a switch device that ha...  
WO/2017/171766A1
In an example, a method comprises receiving a first matrix of values to be mapped to a resistive memory array, wherein each value in the matrix is to be represented as a resistance of a resistive memory element. An outlying value may be ...  
WO/2017/168130A1
An apparatus including a Correlated Electron Switch (CES) element and a programing circuit is provided. The programing circuit provides a programing signal to the CES element to program the CES element to an impedance state of multiple i...  
WO/2017/171979A1
Examples may include techniques to mitigate bias drift for memory cells of a memory device. A first memory cell coupled with a first word-line and a bit-line is selected for a write operation. A second memory cell coupled with a second w...  
WO/2017/171846A1
One embodiment provides an apparatus. The apparatus includes a first inverter comprising a first pull up transistor and a first pull down transistor; a second inverter cross coupled to the first inverter, the second inverter comprising a...  
WO/2017/172284A1
Technology for an apparatus is described. The apparatus can include a memory and a storage controller. The storage controller can be configured to receive a search command with one or more parameters that instructs the storage controller...  
WO/2017/171865A1
An integrated circuit device that utilizes multiple OTP bits to enable and re-enable access to evaluation and testing components comprises a set of multiple one-time programmable (OTP) bits, a programming module operable to trigger a cha...  
WO/2017/172247A1
Technology for an apparatus is described. The apparatus can include a memory controller with circuitry configured to read K bits of M bits of encoded data in memory, D error detection bits, and P Parity bits protecting the M bits of enco...  
WO/2017/166606A1
An audio playback method and apparatus, a terminal device, an electronic device, and a storage medium. After user information pre-stored in earphones is obtained from the earphones (101), a user setting matching the user information is d...  
WO/2017/171052A1
[Problem] To provide a carrier which makes it possible to obtain a high-quality substrate at a higher yield than conventional ones and a substrate manufacturing method using this carrier. [Solution] A carrier 104 according to the present...  
WO/2017/169721A1
The present invention relates to a file generation device and file generation method which, when acquiring an audio stream and a video stream encoded with a lossless compression method, make it possible to acquire a video stream of an op...  
WO/2017/166607A1
Embodiments of the present invention provide an earphone-based sound recording control method and apparatus. The method comprises: obtaining a sound recording instruction triggered on the basis of current earphones; and enabling a corres...  
WO/2017/169600A1
This magnetic head, which reads and writes magnetic information, prevents a signal from being read between the magnetic head and the write circuit during reading of magnetic information. A card reader 1 is provided with a magnetic head 6...  
WO/2017/171823A1
An embodiment includes an apparatus comprising: a memory array comprising: a selector switch including top and bottom electrodes, a metal layer, and a solid electrolyte layer; a memory cell in series with the selector switch; bit and wri...  
WO/2017/166638A1
The embodiments of the invention provide a method of indicating and controlling playback of audio/video data, a device, a mobile terminal, an electronic apparatus, and a non-volatile computer storage medium. In one aspect of the inventio...  
WO/2017/172398A1
The present disclosure includes apparatuses and methods for data movement. An example apparatus includes a memory device that includes a plurality of subarrays of memory cells and sensing circuitry coupled to the plurality of subarrays. ...  
WO/2017/171927A1
A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a corresponding one of the plurality of memory cells MC; and a control circuit that ...  
WO/2017/166853A1
A hard drive storage device comprises a hard drive enclosure (10) configured to accommodate a hard drive (20), and a hub (30) disposed in the hard drive enclosure (10). The hard drive (20) is electrically connected to the hub (30). The h...  
WO/2017/172150A1
A memory and a method for operating a memory are provided. The memory includes a memory cell having a transistor and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the w...  
WO/2017/172812A1
Systems and methods are provided herein for generating and providing a playlist of content relevant to a user that is to be played back instead of advertisement content. In some embodiments, a media guidance application may access a prof...  
WO/2017/172301A1
The present disclosure provides for adaptive scheduling of memory refreshes. One embodiment relates to a method (200) of adapting an initial refresh sequence. In this method, flow and blockage scores for each refresh sequence of a plural...  
WO/2017/166504A1
A multimedia playing state switching method, a device and an on-board player, which relate to multimedia technology. The method comprises the following steps: acquiring the current vehicle state switching information; according to the cu...  
WO/2017/172175A1
Disclosed are systems and methods for improving interactions with and between computers in content generating, searching, hosting and/or providing systems supported by or configured with personal computing devices, servers and/or platfor...  

Matches 701 - 750 out of 855,011