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Patent Searching and Data


Matches 601 - 650 out of 844,402

Document Document Title
WO/2016/097252A1
A resistive switching memory cell (100) comprises a stack of a first electrode (110), a first inner region (120), a second inner region (130), and a second electrode (140). The first inner region (120) comprises one or more metal oxide l...  
WO/2016/100077A3
Methods of monitoring segment replacement within a multimedia stream are provided. A multimedia stream having a replacement segment spliced therein is evaluated by extracting at least one of video, text, and audio features from the multi...  
WO/2016/095071A1
A video processing method, a video processing device and a playing device are provided by embodiments of the present invention, wherein the method includes: obtaining editing operation on a currently played object video, and determining ...  
WO/2016/099438A1
Provided in one example is a nonvolatile memory cross-bar array. The array includes: a number of junctions formed by a number of row lines intersecting a number of column lines; a first set of controls at a first set of the junctions cou...  
WO/2016/098811A1
Provided is a magnetic recording medium in which a lubricant layer contains a compound A represented by formula (1) and a compound B represented by formula (2), satisfies (A/B) = 0.2 to 3.0, and has an average thickness of 0.8 nm to 2 nm...  
WO/2016/100582A1
In described examples, a register writing mechanism (400) does not require reading of the data in the register. In accordance with aspects, each register (204, 206, 208, 210, 434, 436) is masked with a making bit provided by a masking co...  
WO/2016/095544A1
A shift register includes a plurality of shift register units (10), a detecting unit (20), and a reset unit (30). The detecting unit (20) is connected to at least two of the plurality of shift register units (10) to detect output potenti...  
WO/2016/095073A1
An image processing method, device and system. The method comprises: when an editing trigger event for a target image is detected, acquiring description information associated with the target image, the description information comprising...  
WO/2016/098691A1
The present invention relates to a semiconductor device which comprises multiple semiconductor devices laminated together and which allows the laminated semiconductor devices to be identified, and further relates to a manufacturing metho...  
WO/2016/096639A1
The present invention relates to photopolymer comprising a photopolymerizable component and a photo initiator system. Further aspects of the present invention are a holographic media which comprises such a photopolymer, a display which c...  
WO/2016/096535A1
A method and a computer program are disclosed for automatically evaluating music tracks to determine which tracks will be suitable for mixing together, by determining a cost of mixing a current track and each of a number of potential nex...  
WO/2016/095267A1
Provided are a shift register, a level-transmission gate drive circuit, and a display panel, which are capable of reducing the size of a transistor, preventing the deterioration of the transistor, and increasing circuit output capability...  
WO/2016/098326A1
Provided is an audio playback device (10) for application in a vehicle and for playing back recorded audio to the driver of the vehicle. The audio playback device (10) is provided with: a driving-stress estimation unit (13) that estimate...  
WO/2016/099580A3
An integrated circuit which enables lower cost yet provides superior performance compared to standard silicon integrated circuits by utilizing thin film transistors (TFTs) fabricated in BEOL. Improved memory circuits are enabled by utili...  
WO/2016/099681A1
Apparatuses and methods for capturing data using a divided clock are described. An example apparatus includes a clock divider configured to receive a DQS signal, and to provide divided clock signals. A divided clock signal of the divided...  
WO/2016/099513A1
A storage drive adapter may comprise an adapter board, which may include a first and second carrier module interface to removably engage with a first and a second storage drive carrier module, respectively. The adapter board may further ...  
WO/2016/092744A1
This method for producing a magnetic powder comprises the formation of core/shell particles, each of which comprises a shell part containing a soft magnetic material, by reducing the surfaces of particles that contain a hard magnetic mat...  
WO/2016/092416A1
To provide a small, highly reliable memory device with a large storage capacity. A semiconductor device includes a circuit for retaining data and a circuit for reading data. The circuit for retaining data includes a transistor and a capa...  
WO/2016/094741A1
The reliability of NAND flash memory decreases rapidly as density increases, preventing the wide adoptions of flash-based storage systems. This paper studies a novel data representation scheme named rank modulation (RM) for improving NAN...  
WO/2016/093936A1
A non-volatile memory system mitigates the effects of open block reading by analyzing the un-programmed region of a block before programming to determine a potential for read disturbance. The system may perform partial block erase verifi...  
WO/2016/093868A1
Contextual data can be received comprising identification of a medical procedure and a video feed of the medical procedure. Portions of the video feed containing material to-be-censored can be identified. Data for creating a censored vid...  
WO/2016/093935A1
Techniques for reversing damage caused by program-erase cycles in charge-trapping memory to improve long term data retention. A recovery process improves the data retention of a block of memory cells by programming the memory cells to a ...  
WO/2016/094057A1
Examples of systems and methods for mixing sounds are generally described herein. A method may include determining the identification of a plurality of worn devices, each of the plurality of worn devices assigned to a sound. The method m...  
WO/2016/091135A1
A data processing method, processor and system for an external storage medium. The data processing method is applied to a processor, and comprises: acquiring an insertion operation signal of an external storage medium (10); if the extern...  
WO/2016/093016A1
The purpose of the present invention is to achieve a system capable of reliably analyzing a source of unauthorized copies of contents using a content wherein a playback path can be established. The content comprises an individual segment...  
WO/2016/092676A1
Provided is a storage device that achieves a reduction in error rate at the time of data write and data erasure in the storage device to thereby enable high-speed data reading and writing. The storage device is provided with a controller...  
WO/2016/093996A1
Described is an apparatus comprising a leakage tracker to track leakage of a column of resistive memory cells; and a circuit for adjusting voltage on a SourceLine (SL) of the column of resistive memory cells. Described is also an apparat...  
WO/2016/090515A1
The invention relates to a high-density magnetic storage medium provided with low-symmetry ferromagnetic particles, wherein said particles are formed by segments or bars, or systems of bars and combinations of said bars which form struct...  
WO/2016/089574A1
Static random access memory (SRAM) bit cells with wordline landing pads (312(1), 312(2), 312(3)) are split across boundary edges of the SRAM bit cells are disclosed. In one aspect, an SRAM bit cell is disclosed employing write wordline (...  
WO/2016/086430A1
A processing machine of display device, the processing machine comprising: a metal support plate (12); a plurality of supporting structures (13) movably disposed on the metal support plate, for supporting on a non-display area of the gla...  
WO/2016/089474A1
Systems and methods for performing partial block erase operations on a subset of word lines within a memory array prior to performing data refreshing or open-block programming are described. In some cases, data stored in memory cells con...  
WO/2016/090353A3
In described examples of systems and methods for load current compensation for analog input buffers, an input buffer (300) may include: a first transistor (Q1) having a collector terminal coupled to a power supply node and a base termina...  
WO/2016/089563A1
Described are motherboards with memory-module sockets that accept legacy memory modules for backward compatibility, or accept a greater number of configurable modules in support of increased memory capacity. The configurable modules can ...  
WO/2016/089467A1
Methods for performing memory operations on a memory array that includes inverted NAND strings are described. The memory operations may include erase operations, read operations, programming operations, program verify operations, and era...  
WO/2016/087763A1
The invention relates to a circuit for reading a programmed resistive state of resistive elements (102) of a resistive memory (101), wherein each resistive element may be programmed to be in a first or a second resistive state (Rmax, Rmi...  
WO/2016/086714A1
Disclosed are a recording apparatus and a terminal. The recording apparatus comprises: a microphone arranged on a PCB, and a microphone interface. The microphone interface extends outwards at one side of a housing, and the microphone is ...  
WO/2016/089603A1
An STT magnetic memory includes adjacent columns of STT magnetic memory elements having a top electrode and a bottom electrode. A shared bit line is coupled to the top electrode of the STT magnetic memory elements in at least two of the ...  
WO/2016/090133A1
A system and method for producing a new globally -unique identifier (GUID) format that may be used, for instance, to uniquely identify a number of different items in a distributed computer system, such as, for example, transactions in an...  
WO/2016/089241A1
´╗┐The present invention relates to a writing method, a reading method and a shingled recording system for shingled magnetic recording principle for a hard disk drive comprising multiple tracks, wherein the written bits of one byte are a...  
WO/2016/086566A1
A shift register unit, a driving method therefor, a gate drive circuit, and a display device. The shift register unit comprises a latch module (10) and a latch output module (20). Instead of a clock signal, an intermediate signal generat...  
WO/2016/088448A1
The present invention suppresses memory cell degradation in nonvolatile memory. A memory controller is provided with a timer unit, elapsed time determination unit, and reading unit. The timer unit times the elapsed time that has passed s...  
WO/2016/086431A1
A liquid-crystal display device and a shift register thereof are provided. Each shift register unit of the shift register comprises a storage circuit (31), an electric potential control circuit (32) and a phase-inverter circuit (33), whe...  
WO/2016/088741A1
Disclosed is a method for reducing the time from re-activation of a power supply following disconnection of the power supply to the start of recording in a constantly operating video recording apparatus. The recording apparatus is provid...  
WO/2016/087583A1
Methods and devices are described for reducing the audible effect of pre- responses in an audio signal. The pre-responses are effectively delayed by employing a digital non-minimum-phase filter, which includes a zero lying outside the un...  
WO/2016/089587A1
Static random access memory (SRAM) bit cells with wordlines on separate metal layers for increased performance are disclosed. In one aspect, an SRAM bit cell is disclosed employing a write wordline in a second metal layer, a first read w...  
WO/2016/089646A3
Non-volatile memory devices and logic devices are fabricated using processes compatible with high dielectric constant/metal gate (HK/MG) processes for increased cell density and larger scale integration. A doped oxide layer, such as a si...  
WO/2016/088298A1
The record playback apparatus of the present disclosure is provided with: a plurality of optical pickups for recording information on a recording medium or playing back information from the recording medium; a single transport mechanism ...  
WO/2016/085470A1
A circuit comprising an input, a ground, a first switch, a second switch and a bi-polar memristor, wherein the first switch is a first transistor and a gate of the first transistor is connected to a line to instruct setting of the bi-pol...  
WO/2016/082340A1
A charging scanning and charge sharing scanning dual-output GOA circuit, combining a timing with a circuit; an nth stage GOA unit circuit receives a first low frequency clock signal (LC1), a second low frequency clock signal (LC2), a dir...  
WO/2016/085845A1
A storage device includes a controller that implements an interlaced magnetic recording scheme with prioritized random access. According to one implementation, a controller is configured to write data at a first linear density to alterna...  

Matches 601 - 650 out of 844,402