Login| Sign Up| Help| Contact|

Patent Searching and Data


Matches 501 - 550 out of 845,503

Document Document Title
WO/2016/167778A1
In one example in accordance with the present disclosure a resistive memory array is described. The array includes a number of resistive memory elements to receive a common-valued read signal. The array also includes a number of multipli...  
WO/2016/168238A1
Selective coupling of power rails to memory domain(s) in processor-based system, such as to reduce or avoid the need to provide intentional decoupling capacitance in logic domain(s) is disclosed. To avoid or reduce providing additional i...  
WO/2016/168832A1
Content is transferred from a first non-volatile storage medium to a second non-volatile storage medium without reproduction. This is accomplished by reading first data stored in the first non-volatile storage medium from the first non-v...  
WO/2016/168123A1
A CMOS anti-fuse cell is disclosed. In one aspect, an apparatus includes an N- well and an anti-fuse cell formed on the N- well. The anti-fuse cell includes a drain P+ diffusion deposited in the N- well, a source P+ diffusion deposited i...  
WO/2016/165546A1
Provided are a shift register and a unit thereof. A low-level maintaining module (30) comprises a first maintaining unit (31) and a second maintaining unit (32). The first maintaining unit (31) and the second maintaining unit (32) are re...  
WO/2016/166931A1
Provided is a magnetic recording medium comprising: a support; a base layer containing a carbon particle powder and a metal-containing particle powder; and a recording layer. At the recording surface, the maximum indentation depth h is 8...  
WO/2016/167869A1
A method of forming a magnetic electrode of a magnetic tunnel junction comprises forming non-magnetic MgO-comprising material over conductive material of the magnetic electrode being formed. An amorphous metal is formed over the MgO-comp...  
WO/2016/168602A2
A system and method of refreshing dynamic random access memory (DRAM) are disclosed. A device includes a DRAM, a bus, and a system-on-chip (SOC) coupled via the bus to the DRAM. The SOC is configured to refresh the DRAM at a particular r...  
WO/2016/167756A1
One example includes a resistive random access memory (RRAM) system. The system includes a resistive memory element to store a binary state based on a resistance of the resistive memory element. The system also includes an RRAM write cir...  
WO/2016/165393A1
A hard disk installation device, comprising: an installation box and at least one installation case configured to install a hard disk, wherein the installation box is provided with a fixing part, and the installation case is detachably f...  
WO/2016/168695A1
Power rail control systems that include power multiplexing circuits that include cross-current conduction protection are disclosed. Power multiplexing circuit includes supply selection circuits each coupled between a respective supply po...  
WO/2016/166980A1
An actuator 100 comprising: a holder 50 having a rotation shaft 52, and a mounting surface to which a diffraction grating 1 is attached; a fixed part 20 having a bearing 21a that holds the rotation shaft 52 of the holder 50; an elastic m...  
WO/2016/161865A1
A hard disk installation device comprises a container (101) and a cover (102) matching the container (101). A hard disk (104) is fixed by the container (101) and the cover (102), and the container (101) and the cover (102) are fixed by a...  
WO/2016/163312A1
Provided are an optical information recording and reproduction device capable of generating a control signal with suitable signal quality even when the light quantity of a reproduction signal fluctuates in a holographic memory, and a met...  
WO/2016/161768A1
A shift register unit (100 and 300), a gate driver circuit, a display device (800), and a driving method for use in the shift register unit (100 and 300). The shift register unit (100 and 300) comprises: an input module (10), which contr...  
WO/2016/164049A1
A temperature compensation circuit may comprise a temperature sensor to sense a temperature signal of a memristor crossbar array, a signal converter to convert the temperature signal to an electrical control signal, and a voltage compens...  
WO/2016/162560A1
The invention relates to a method for detecting and synchronizing audio/video signals. At least one audio signal (140) is detected by means of at least one microphone unit (110). Timestamps (117) are generated and stored together with th...  
WO/2016/164319A1
A non-volatile memory system comprises a plurality of memory cells arranged in a three dimensional structure and one or more control circuits in communication with the memory cells. The one or more control circuits are configured to prog...  
WO/2016/164779A1
In some embodiments, systems and methods for storing and/or retrieving digital information in a nucleic acid library are provided. In some embodiments, an integrated system comprising a nucleic acid synthesis device, a nucleic acid seque...  
WO/2016/163100A1
This video server is provided with: a plurality of ports used for input and output of source data; a storage unit capable of storing group information relating to grouping of the plurality of ports; and a control unit which receives a sp...  
WO/2016/161626A1
Disclosed in the embodiments of the present invention are a storage device and unmanned aircraft employing the same. The storage device comprises: a solid-state hard disk, configured to store data; an mSATA connector, electrically connec...  
WO/2016/161901A1
A shift register adaptable to a negative threshold voltage and unit thereof. The shift register comprises a plurality of cascaded shift register units. The shift register units comprise: a charging module (11), a driving module (12), a d...  
WO/2016/163978A1
A memory cell includes either a nonvolatile resistance memory device or a nonvolatile memory device in series with a selector. The nonvolatile resistance memory device includes a dielectric layer sandwiched between a first bottom electro...  
WO/2016/164229A1
The disclosed embodiments comprise a flash memory device and a method of programming the device in a way that reduces degradation of the device compared to prior art methods.  
WO/2016/164270A1
An offset cancelling sense amplifier according to some examples of the disclosure may use a double sensing margin structure and positive feedback to achieve better performance characteristics and read stability without a multistage opera...  
WO/2016/161726A1
A shift register unit comprising a pull-up module (101), an input module (102), a pull-down control module (103), a pull-down module (104), a reset and discharge module (105), a voltage divider module (106), a holding module (107), and a...  
WO/2016/161725A1
A shift register unit (100) comprising a pull-up module (101), an input module (102), a reset module (103), a first pull-down module (104), a second pull-down module (105), a first control module (106), a second control module (107), a f...  
WO/2016/161727A1
Provided are a shift register unit, a driving method, an array substrate gate electrode driver device, and a display panel, for use in reducing the duty cycle of a thin-film transistor connected at a pull-down node, thus preventing aging...  
WO/2016/158867A1
This magnetoresistive effect element has a first ferromagnetic metal layer, a second ferromagnetic metal layer, and a tunnel barrier layer sandwiched between the first and second ferromagnetic metal layers, wherein: the tunnel barrier la...  
WO/2016/160165A1
Methods and apparatus related to cost optimized Single Level Cell (SLC) write buffering for Three Level Cell (TLC) Solid State Drives (SSDs) are described. In one embodiment, non-volatile memory includes a first region in a Single Level ...  
WO/2016/160950A1
An asynchronous memory includes a memory array, a sense amplifier, an output latch, and a controller. In response to a clock signal from an external circuit requesting a read operation, the controller provides the clock signal to the mem...  
WO/2016/155322A1
An RRAM voltage generation system comprises a charge pump (12), a square-wave oscillator (13), a linear voltage regulator (14), a power-on control circuit (15), and a voltage and current reference source (11). The charge pump (12) is use...  
WO/2016/155476A1
A sense amplifier for a resistive random access memory comprises: a storage branch (11a), for converting the resistance value state of a variable resistor in a storage unit (111) into a corresponding voltage signal Vmat to output; a refe...  
WO/2016/160276A1
A memory subsystem manages memory I/O impedance compensation by the memory device monitoring a need for impedance compensation. Instead of a memory controller regularly sending a signal to have the memory device update the impedance comp...  
WO/2016/158427A1
Provided is an austenitic stainless steel sheet which exhibits excellent cleanability, anti-glare properties, and hydrophilicity. In this austenitic stainless steel sheet, which is temper rolled using a dull roll after being subjected to...  
WO/2016/157681A1
A magnetic recording medium according to the present invention includes: a support; a recording layer; and a protective layer provided on at least one surface of the support and containing plate-shaped powder particles. The plate-shaped ...  
WO/2016/160158A1
Described is an apparatus: a plurality of memory cells; a bias logic coupled with at least one memory cell of the plurality, the bias logic to: apply a first read voltage to the at least one memory cell; and apply a second read voltage t...  
WO/2016/155368A1
An RRAM cell-based nonvolatile SRAM memory cell comprises a conventional six-transistor SRAM cell (6T-SRAM) and two 1T1R RRAM cells. The 6T-SRAM comprises: two N-type transistors (NAL, NAR), respectively connected to a data line (Q, QB) ...  
WO/2016/157922A1
Provided is a soft magnetic film having little Bs reduction even at high temperatures, and a sputtering target used for forming said soft magnetic film. A soft magnetic film having a composition formula in terms of atomic ratios of (CoaF...  
WO/2016/158691A1
This electronic circuit is provided with: a bistable circuit which is connected between a positive power source to which a power source voltage is supplied, and a negative power source, and in which a first inverter and a second inverter...  
WO/2016/160638A1
Methods and systems for modifying an image by applying an effect to an image are described. The effects include a pop effect, a light adjustment, or a color adjustment to an image. The methods and systems include providing a user slider ...  
WO/2016/157719A1
The present invention includes: a first rewriting step for applying a precharge voltage to both a plurality of bit lines and a plurality of source lines; a second rewriting step for applying a rewriting voltage to either a selected bit l...  
WO/2016/160133A1
Described is a method which comprises performing a first read from a portion of a non-volatile memory, the first read to provide a first codeword; decoding the first codeword; determining whether the decoding operation failed; performing...  
WO/2016/159818A1
´╗┐The device consists of a base (1), a lid (2), a first lateral wall (3) and a second lateral wall (4). The base (1) and the lid (2) are foldably interconnected. The first lateral wall (3) and the second lateral wall (4) are arranged op...  
WO/2016/158849A1
This magnetoresistive effect element has a first ferromagnetic metal layer, a second ferromagnetic metal layer, and a tunnel barrier layer sandwiched between the first and second ferromagnetic metal layers, wherein: the tunnel barrier la...  
WO/2016/156244A1
A system and method for instructing rendering of a video sequence, the method being carried out on a first device and comprising: receiving video content from a camera; determining a video sequence, the video sequence comprising a select...  
WO/2016/161346A1
An apparatus has a syringe housing. A plunger has a shaft, wherein the plunger is slidably received within the syringe housing between a first and second position. A Hall sensor is disposed within the shaft and a magnet is fixed proximat...  
WO/2016/159228A1
This magnetic disk substrate has a pair of main surfaces, said main surfaces having an arithmetic average roughness Ra of 0.11 nm or less. The regions respectively occupied by a plurality of protrusions among surface irregularities on th...  
WO/2016/157261A1
In each of a plurality of recording layers of a write-once-read-many optical disc, two tracks comprising a groove and the adjacent land are formed to be a spiral. A method for writing data comprises a step of receiving data and data writ...  
WO/2016/160311A1
A method of forming a nanostructure comprises forming a directed self assembly of nucleic acid structures on a patterned substrate. The patterned substrate comprises multiple regions. Each of the regions on the patterned substrate is spe...  

Matches 501 - 550 out of 845,503