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Patent Searching and Data


Matches 501 - 550 out of 852,936

Document Document Title
WO/2017/087641A1
Systems and methods for video editing and playback are described. A video including a plurality of signals is received, where at least one signal represents an identifiable type of content over a length of the video. One or more portions...  
WO/2017/087333A1
A content server generates sponsored audio including procedurally generated background music. The content server obtains reference music features describing musicological characteristics of reference songs as well as sponsored audio info...  
WO/2017/085933A1
A method for manufacturing a thin film, the method comprising: a step for forming a thin film using at least one material among a ferromagnetic body, a ferrimagnetic body, a paramagnetic body, and a antiferromagnetic body; and a step for...  
WO/2017/086399A1
According to the present invention, electrode layers 24, 26 are connected to a bismuth ferrite layer 22 by being arranged so as to sandwich the bismuth ferrite layer 22 from a direction that is perpendicular to the c-axis of a bismuth fe...  
WO/2017/083019A1
Some embodiments include apparatuses having a first node to receive a supply voltage, a second node, a switching circuit to couple the first node to the second node and to decouple the first node from the second node, circuit blocks coup...  
WO/2017/081756A1
A semiconductor device according to one embodiment of the present invention is provided with: first through 32nd memory cells; first through 16th bit lines connected to the first through 16th memory cells; 17th through 32nd bit lines con...  
WO/2017/083230A1
A microelectronic assembly can include an address bus comprising a plurality of signal conductors each passing sequentially through first, second, third, and fourth connection regions, and first and second microelectronic packages. The f...  
WO/2017/079854A1
The present invention relates to a method for nanomodulating metal films by means of high-vacuum cathode sputtering of metals, and to stencils of anodised Al. As an example of the use of these nanomodulated metal films, the synthesis or ...  
WO/2017/080239A1
An audio recording tagging method and recording device: collecting a current audio recording and extracting from said recording voice print feature parameters (101); performing voice print cluster training on said voice prints, to obtain...  
WO/2017/083204A1
A device for creating video clips from an omnidirectional video is presented. The device comprises at least one processor and a memory including computer program code. The memory is configured to store an omnidirectional video comprising...  
WO/2017/080093A1
A gate drive circuit (1) and a shift register circuit (10). The gate drive circuit (1) comprises a plurality of cascaded shift register circuits (10). Each shift register circuit (10) comprises a signal transmission circuit (11) and a NO...  
WO/2017/083154A1
A memory system includes a word-line coupled to memory cells in a row, and a bit-line coupled to memory cells in a column. Each of the memory cells includes a memory storage element including a Josephson junction configured to be in eith...  
WO/2017/082983A3
A system is provided for multiplexed readout of qubits. The system comprises a plurality of bandpass (BP) filter resonant sections that are each coupled to a different respective point on a read line, wherein each BP filter resonant sect...  
WO/2017/081848A1
This method for sorting magnetic powder for magnetic recording includes applying a magnetic field to a liquid in which magnetic powder for magnetic recording is dispersed, and moving the magnetic field application position relative to th...  
WO/2017/081078A1
The invention relates to a kit-of-parts containing at least one sealing layer C and one photopolymer B, a method for producing an at least partially connected layer structure consisting of at least two layers, the use of the at least one...  
WO/2017/082175A1
There is provided an information processing apparatus that reproduces data recorded onto a recording medium, the apparatus including: circuitry configured to convert a color space of an image recorded onto the recording medium, and super...  
WO/2017/083829A1
A synchronization device to synchronize at least one signal with an initiation of an event may generally comprise a time code generator to generate a first time code signal, a synchronization logic unit to calculate a time delay between ...  
WO/2017/083004A1
A memory system and method for improving write performance in a multi-die environment are disclosed. In one embodiment, a memory system is provided comprising a plurality of memory dies and a controller. The controller is configured to d...  
WO/2017/083087A1
Multi-bit non-volatile random access memory cells are disclosed. A multi-bit non-volatile random access memory cell may include a volatile storage element and a non-volatile storage circuit. The non-volatile storage circuit may include a...  
WO/2017/083267A1
A method of accessing data stored in a storage disk of a storage system includes the steps of receiving a read operation to a sector of the storage disk and in response to an error returned from the read operation, determining whether th...  
WO/2017/077602A1
This storage device 101 comprises a shingled magnetic recording device 103, a management unit 108, a selection unit 106, and an execution unit 107. The shingled magnetic recording device 103 uses a band that includes adjacent track group...  
WO/2017/075843A1
Provided is a scan driving device (20), which comprises a plurality of scan driving circuits (21), a detection driving circuit (22), and a regulation module (23), wherein the scan driving circuits (21) each comprise a pull-up control mod...  
WO/2017/075747A1
Methods, systems, and machine-readable storage medium for programming a storage device are disclosed. In some embodiments, the methods include: performing a verify operation on a plurality of storage elements of the storage device to det...  
WO/2017/078920A1
A memory device including a silicon substrate having a planar upper surface in a memory cell area and an upwardly extending silicon fin in a logic device area. The silicon fin includes side surfaces extending up and terminating at a top ...  
WO/2017/078918A1
A non-volatile memory cell that includes a silicon substrate, source and drain regions formed in the silicon substrate (where a channel region of the substrate is defined between the source and drain regions), a metal floating gate dispo...  
WO/2017/078988A1
Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write p...  
WO/2017/078877A1
Magnetic tunnel junction (MTJ) devices with a heterogeneous free layer structure particularly suited for efficient spin-torque-transfer (STT) magnetic random access memory (MRAM) (STT MRAM) are disclosed. In one aspect, a MTJ structure (...  
WO/2017/079511A1
Embodiments of an electroentropic memory device comprising an array of electroentropic storage devices (EESDs) are disclosed, as well as methods of making and using the electroentropic memory device. The memory device includes a pluralit...  
WO/2017/076084A1
A shift register unit, gate drive circuit, drive method thereof and display device, the shift register unit comprising two transmission gate modules (221, 212), four AND gate modules (231, 232, 233, 234) and two capacitor modules (241, 2...  
WO/2017/073394A1
According to the present invention, in a memory cell forming unit (3a), four electrical disconnection units (13a, 13b, 13d, 13c (13e, 13f, 13h, 13g)) which can disconnect a source-side selection gate electrode (SG) from a drain-side sele...  
WO/2017/074575A1
Based on performance during programming, the non-volatile memory cells are classified as fast programming memory cells and slow programming memory cells (or other classifications). At a separate time for each programmed state, threshold ...  
WO/2017/075464A1
Systems, methods, and apparatus for operating an integrated circuit (IC) are provided. An apparatus may be configured to receive at one or more switches a signal from at least one circuit positioned on a first die lying within a first ge...  
WO/2017/074581A1
Non-volatile memory systems with mufti-write direction memory units are disclosed in one implementation an apparatus comprises a non-volatile memory and a controller in communication with the non-volatile memory. The controller is config...  
WO/2017/074292A1
A volatile memory device includes a memory array of volatile charge storage cells, a counter to track a time since the volatile memory device has received a read/write command and a control element to automatically change the volatile me...  
WO/2017/073667A1
An audio device that comprises: a network communication unit that communicates with other first and second audio apparatuses; a sound emission unit that emits audio signals as sound; and a control unit. When one channel that is for audio...  
WO/2017/074586A1
Apparatus and method for performing a post-write read in a memory device are disclosed. A memory device may include 3-dimensional memory, with the wordlines in a memory block each having multiple strings. Periodically, the memory device ...  
WO/2017/074600A1
Embodiments include a system, method, and apparatus for creating a trusted speech transcription. Transcription logic can receive a signal of audible speech from an audio source and convert the audible speech signal into text. Sampling lo...  
WO/2017/074263A1
A magnetic memory device (300) comprises a memory component (112) comprising perpendicular magnetic anisotropy material. The writing component comprises electrically-conductive material, the writing component being for writing a magnetic...  
WO/2017/074579A1
Technology is described herein for reclaiming a memory device that has a defective plane. A solution allows a memory device with a defective plane to operate as a single plane device. The memory device with the defective plane may be use...  
WO/2017/074589A1
A data storage device includes a memory including multiple storage elements. The data storage device also includes circuitry configured to determine, for a particular storage element of the multiple storage elements, an indicator associa...  
WO/2017/074604A1
Systems, apparatuses and methods may provide for identifying a target sub-block of NAND strings to be partially or wholly erased in memory and triggering a leakage current condition in one or more target select gate drain-side (SGD) devi...  
WO/2017/074521A1
A tool is disclosed for use in managing waste services, The tool may have an interface configured to receive input from a user indicative of an on-demand service request. The tool may also have a communication device, and a controller in...  
WO/2017/074737A1
According to one embodiment of the present invention, an apparatus is disclosed. The apparatus includes a memory array having a plurality of memory cells. The apparatus further includes memory access circuits coupled to the memory array ...  
WO/2017/074563A1
Systems and methods for managing a data buffer of a non-volatile memory system are disclosed. The method may include a controller of a storage system retrieving host data, storing the retrieved data in a data buffer and transferring the ...  
WO/2017/075622A1
In described examples, a BIST controller (40) generates test data patterns to be applied to embedded memories (45) through a BIST data path. Each embedded memory (45) is coupled to a dedicated local comparator (46) that compares data rea...  
WO/2017/075279A1
Embodiments of the invention provide an audio blending system with a computing device that processes operations including receiving a transition request from a user including an out element and/or an in element of at least one transition...  
WO/2017/075442A1
A data storage device includes a solid-state memory including memory cells and a controller that performs a first programming scheme that programs a first subset of the cells to a first voltage state using a first target voltage, program...  
WO/2017/073358A1
A sample-and-hold circuit includes a sampling capacitor, a first transistor, a first switch between a gate electrode and a source electrode of the first transistor, a current source connected to the source electrode of the first transist...  
WO/2017/074358A1
A circuit includes a resistive memory cell in a memory array to store a memory state for the resistive memory cell. A reference cell in the memory array stores a reference memory state for the resistive memory cell. A function generator ...  
WO/2017/074576A1
Techniques are provided for reducing current consumption while programming non-volatile storage. A smart verify is performed using a subset of memory cells. By applying the smart verify to just a subset of the memory cells current is sav...  

Matches 501 - 550 out of 852,936