Login| Sign Up| Help| Contact|

Patent Searching and Data


Matches 351 - 400 out of 853,453

Document Document Title
WO/2017/150579A1
Provided is a management device 10 that includes a plurality of tracks (MTR 101) that correspond to a plurality of terminal devices 20, that commands the terminal devices 20 to start or stop recording in accordance with a recording start...  
WO/2017/150980A1
Quantum dot circuit and a method of characterizing such a circuit Voltages that enable control of electron occupation in a series of quantum dots are determined by a method of measuring effects of gate electrode voltages on a quantum dot...  
WO/2017/151058A1
A reader structure, a method of biasing a free layer of a reader structure, and a read head are provided, the reader structure comprises a free layer having a reader edge for interacting with and being proximal to a magnetic media; a fir...  
WO/2017/151302A1
A memory array includes a first subarray of memory cells and a second set of memory cells. The first and second subarrays of memory cells share a set of global word lines. The first and second subarrays of memory cells are coupled to fir...  
WO/2017/148137A1
A shift register unit (100, 200, 300, 300A, 300B, 400, 600) includes a first node-control circuit (11, 71) for controlling a pull-up node (PU), a second node-control circuit (12, 72) for controlling a pull-down control node (PDCN), a thi...  
WO/2017/150970A1
The present invention is in the field of an atomic scale data storage device which uses vacancy manipulation, a method of providing said device, and a method of operating said device. Prior art mass data storage devices typically rely on...  
WO/2017/149412A1
The invention relates to devices intended for storing, systemising and using information in order to plan events and/or specific periods of time, and/or for educational purposes, and/or for carrying out games based on the use of cards. T...  
WO/2017/150970A4
The present invention is in the field of an atomic scale data storage device which uses vacancy manipulation, a method of providing said device, and a method of operating said device. Prior art mass data storage devices typically rely on...  
WO/2017/151296A1
A memory device and method comprising a metal oxide material disposed between and in electrical contact with first and second conductive electrodes, and a voltage source configured to apply a plurality of voltage pulses spaced apart in t...  
WO/2017/149874A1
A magnetoresistive element 10 is provided with: a first laminated structure 20 having a first surface 20A, and a second surface 20B on the reverse side of the first surface 20A; and a second laminated structure 30, which is formed by lam...  
WO/2017/150524A1
A film which is composed of a non-magnetic material and a magnetic metal containing Fe and Pt, and which is characterized by additionally containing Mg and having a composition represented by (Fe1-αPtα)1-βMgβ (wherein α and β are n...  
WO/2017/151567A1
A dynamic random access memory (DRAM) content aware refresh system includes a central processing unit (CPU) communicatively coupled to a memory controller having a content aware refresh unit. A main memory includes DRAM organized into a ...  
WO/2017/149282A1
There is provided a multiple data rate memory comprising a clock splitting circuit and a multiplexing address latch. The clock splitting circuit is configured to generate first and second internal clock pulses from a rising edge of an ex...  
WO/2017/151482A1
Speech understanding in the presence of background noise can be assessed using novel hearing tests. One such test is a Masking Level Difference with Digits (MLDD) test, which is a clinical tool designed to measure auditory factors that i...  
WO/2017/147936A1
The present application relates to the technical field of smart homes. Disclosed is a smart home assistant, comprising: audio devices placed in various indoor locations; a control router for establishing a network; and a plurality of con...  
WO/2017/151192A1
An apparatus that includes a reference generating circuit configured to generate a reference signal for a non-volatile memory (NVM) device, the reference generating circuit including a first circuit comprising at least one metal-oxide-se...  
WO/2017/151665A1
A memory device can include: a memory array with memory cells arranged as data lines; an interface that receives a read command requesting bytes of data in a consecutively addressed order from an address of a starting byte; a first buffe...  
WO/2017/150028A1
A semiconductor circuit of the present disclosure is provided with: a first circuit configured to be able to generate, on the basis of a voltage at a first node, an inverted voltage of the voltage at the first node and to apply the inver...  
WO/2017/151440A1
Implementations generally relate to storage systems. In one implementation, a system includes a plurality of storage libraries that store a plurality of removable media units. The system also includes a plurality of head units for readin...  
WO/2017/151211A1
Methods, devices and systems are provided for making a shingled magnetic recording (SMR) hard disk drive operate with similar random access characteristics of a conventional hard drive despite the SMR disk having strict sequential write ...  
WO/2017/149295A1
There is provided a multiple data rate memory configured to implement first and second memory accesses within a single cycle of an external clock signal. The memory comprises a plurality of memory cell groups, each memory cell group comp...  
WO/2017/151474A1
A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further config...  
WO/2017/151803A1
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ground reference scheme may be employed in a digit line voltage sensing operation. A positive voltage may be applied to a memory cell; and ...  
WO/2017/151697A1
A system includes a rack and one or more server systems mounted in the rack. A server system includes a chassis with one or more arrays of devices in the chassis. Each array includes mass storage devices and a server device mounted in th...  
WO/2017/151735A1
A fixed magnetic skyrmion in a memory or Boolean logic or non-Boolean computing element is reversibly switched or switchable (1) with only an electric field and without a magnetic field or spin current; and (2) using voltage control of m...  
WO/2017/147081A1
A voice input comprising a command word, one or more media variable instances, and one or more zone variable instances is received. A media playback system command corresponding to the command word is determined. Media content correspond...  
WO/2017/146996A1
The present disclosure includes a redundant array of independent NAND for a three dimensional memory array. A number of embodiments include a three-dimensional array of memory cells, wherein the array includes a plurality of pages of mem...  
WO/2017/145721A1
The present invention obtains a displayable image from an information recording medium in accordance with the type of image stored in the information recording medium and display function information of a display device, and outputs the ...  
WO/2017/146706A1
In one example in accordance with the present disclosure a device is described. The device includes at least two memristive cells. Each memristive cell includes a memristive element to store one component of a complex weight value. The d...  
WO/2017/146821A1
Methods and apparatus related to supporting both DDR (Double Data Rate) and NVM (Non-Volatile Memory) DIMM (Dual Inline Memory Module) on the same memory slot are described. In one embodiment, a DIMM comprises volatile memory and non-vol...  
WO/2017/147075A1
A first message may be received comprising a voice command received by a microphone device associated with a media playback system, where the media playback system comprises one or more zones each comprising one or more playback devices....  
WO/2017/144856A1
A device comprising one or more resistive random access memory (ReRAM) elements and a random number generator configured to generate a random number in dependence on an impedance value of the or each ReRAM element.  
WO/2017/143584A1
Disclosed herein is an apparatus suitable for detecting an image, comprising: a plurality of pixels (150) configured to generate an electric signal upon exposure to a radiation; an electronics system (121) associated with each of the pix...  
WO/2017/147112A1
An optical beam deflection device includes a dual-twist Pancharatnam phase device (DTPPD) with first and second Pancharatnam layers each with an in-plane twist and a transverse twist that is at least 60° over the thickness of each Panch...  
WO/2017/147461A1
An approach is provided for providing a code to link broadcast content to web content via a service. The approach involves presenting at least one code during a broadcast of at least one program in at least one device. The approach also ...  
WO/2017/144887A1
There is provided a SRAM memory unit comprising a SRAM memory cell, the memory cell being operatively connected to one or more bit lines, and wherein access for the one or more bit lines to the memory cell during a write operation is con...  
WO/2017/147203A1
A system and method for content management are disclosed. The system can be used to manage any type of digital and a system and method for generating, delivering, measuring, and managing media apps to showcase content, such as videos, do...  
WO/2017/147310A1
In a memory array comprising a word line and a bit line, each of a plurality of memory cells of the memory array has a first terminal connected to the bit line and a current path between the first terminal and a respective second termina...  
WO/2017/145722A1
According to the present invention, a displayable image is acquired from an information recording medium in accordance with the type of the image stored in the information recording medium and display function information of the display ...  
WO/2017/145995A1
A fluorine-containing ether compound represented by formula (1). R4CH2R3CH2R2CH2R1CH2R2CH2R3CH2R5 (1) (In formula (1), R1and R3 are the same or different perfluoropolyether chains, R2 is a linking group containing at least 1 polar group,...  
WO/2017/144854A1
Broadly speaking, embodiments of the present techniques provide an amplification circuit comprising a sense amplifier and at least one Correlated Electron Switch (CES) configured to provide a signal to the sense amplifier. The sense ampl...  
WO/2017/146683A1
In one example in accordance with the present disclosure a memristive array is described. The memristive array includes a number of bit cells, each bit cell including a memristive element and a selecting transistor serially coupled to th...  
WO/2017/144855A1
According to one embodiment of the present disclosure, a device comprises a latching circuitry, where the latching circuitry comprises at least one correlated electron switch, hereinafter termed CES, element. The latching circuitry furth...  
WO/2017/146644A1
Various embodiments may provide a circuit arrangement. The circuit arrangement may include a first spin-orbit torque magnetic tunnel junction cell, a second spin-orbit torque magnetic tunnel junction cell, a first driver circuit arrangem...  
WO/2017/145312A1
This semiconductor storage device comprises: a plurality of memory cells arranged in a matrix; word lines provided corresponding to rows of the memory cells; dummy word lines formed in a metal wiring layer adjacent to the metal wiring la...  
WO/2017/146692A1
In one example in accordance with the present disclosure a control circuit is described. The control circuit includes a source following component to receive an input voltage and output a switching voltage. The circuit also includes an i...  
WO/2017/144862A1
A logic gate comprises a first input (A) and a second input (B), and further comprises a first memristor (M1), a second memristor (M2), a third memristor (M3), and a fourth memristor (M4), each memristor having a positive terminal and a ...  
WO/2017/145453A1
A semiconductor storage device comprising: a plurality of memory cells arranged in a matrix; word lines provided corresponding to the memory cell rows; dummy word lines formed in a metal wiring layer adjacent to a metal wiring layer havi...  
WO/2017/145751A1
This aluminum substrate for a magnetic recording medium is provided with: an aluminum substrate; an anodic oxide film which is formed on the aluminum substrate and which has a thickness of 7-25 µm; an organic-inorganic hybrid silica fil...  
WO/2017/142897A1
Apparatuses including an interface chip that interfaces with dice through memory channels are described. An example apparatus includes: an interface chip that interfaces with a plurality of dice through a plurality of memory channels, ea...  

Matches 351 - 400 out of 853,453