Login| Sign Up| Help| Contact|

Patent Searching and Data


Matches 351 - 400 out of 845,016

Document Document Title
WO/2016/182085A1
A magnetoresistive effect element (100) has a recording layer (10) that contains a ferromagnetic body, a barrier layer (20) layered on the recording layer (10), and a reference layer (30) layered on the barrier layer (20), the reference ...  
WO/2016/179982A1
A shift register and a driving method therefor, a gate drive circuit and a display apparatus. The shift register comprises a triggered reset module, a pull-up module, a first capacitor and a pull-down module, and further comprises a deno...  
WO/2016/182753A1
Sensing techniques and associated circuitry are provided for use with a memory device. The techniques are suited for sensing operations involving even-numbered or odd-numbered bit lines. In one approach, a mapping between caches and sens...  
WO/2016/181893A1
Provided is a method for cleaning a substrate treatment device that etches films containing metal, wherein the cleaning method has: a first cleaning step for removing carbon-containing deposits using a plasma generated from a gas that in...  
WO/2016/179153A1
A stability structure for a mobile electronic device is provided. The stability structure includes a plurality of aglets. An elastic member is connected to and extends between the aglets. The elastic member is placed against a back surfa...  
WO/2016/177317A1
Disclosed in the present invention is a double-sided optical disc drive, comprising a first optical pickup unit, a second optical pickup unit, an optical disc drive motor and a controller. The first optical pickup unit is used to read an...  
WO/2016/176807A1
Disclosed are a DRAM refreshing method, apparatus and system. By designating a region needing to be refreshed in a refreshing block in a refreshing instruction, a designated position of a DRAM storage array can be refreshed. The method c...  
WO/2016/179309A1
In described examples, a system for error correction code (ECC) management of write-once memory (WOM) codes includes a host processor arranged to send a data word that is to be stored in a WOM (write-only memory) device. A host interface...  
WO/2016/179386A1
Methods, systems and computer readable media may facilitate the repositioning of content based upon scene boundaries. In embodiments, content may be automatically repositioned at a scene boundary, so that the content presentation starts ...  
WO/2016/177328A1
A shingled magnetic recording (SMR) append-only file system includes a disk comprising a plurality of concentric append-only shingled data bands having partially overlapping data tracks, wherein the data bands are associated with a circu...  
WO/2016/178172A1
A multi-memory cell operator includes a non-destructive memory array, an activation unit and a multiple column decoder. The non-destructive memory array has first and second bit lines per column. The activation unit activates at least tw...  
WO/2016/178678A1
A photodetector includes an array of pixels, each pixel comprising a defined doped region defined in a doped semiconductor layer. The defined doped region is defined by selected regions of ion implants to provide resistive isolation betw...  
WO/2016/175920A1
Techniques related to input and output signal synchronization and latency jitter compensation for audio systems are discussed. Such techniques may include determining a number of virtually buffered samples based on a detected latency bet...  
WO/2016/174979A1
A memory device according to an embodiment of the present technology comprises: a plurality of memory cells arranged in matrix; a plurality of row wires connected to one end of each memory cell; a plurality of column wires connected to t...  
WO/2016/174524A2
Methods and systems are disclosed related to the processing of video and sensor data recorded by a video camera. For example, a first embodiment is directed to the storage of sensor data in a metadata portion of a digital media file, a s...  
WO/2016/175005A1
The present invention addresses the problem of providing an educational support system capable of providing an educator and young students with information that allows the young students to learn effectively and efficiently. The educatio...  
WO/2016/175956A1
Magnetic tunnel junction (MTJ) memory bit cells that decouple source line layout from access transistor node size to facilitate reduced contact resistance are disclosed. In one example, an MTJ memory bit cell (500B) is provided that incl...  
WO/2016/174951A1
The present invention addresses the problem of providing an educational support system in which an educator can carry out precise assessment based on the disabilities and characteristics of each young individual student, and which allows...  
WO/2016/175118A1
A transistor Tr8, which has a drain terminal connected to a node N2, a source terminal to which an OFF potential is applied, and a gate terminal connected to an output terminal OUT, is provided in a unit circuit 11 of a shift register to...  
WO/2016/175958A3
In an array (200) that qualifies each row according to a valid/invalid state, each row may each include valid-gated read circuitry (220) to conditionally block a read wordline according to the state of a valid bit cell (224) from togglin...  
WO/2016/174509A1
According to one embodiment, a magnetic memory device includes a magnetic memory chip having a magnetoresistive element, a magnetic layer having first and second portions spacing out each other, the first portion covering a first main su...  
WO/2016/175958A2
In an array that qualifies each row according to a valid/invalid state, each row may each include valid-gated read circuitry to conditionally block a read wordline from toggling unless the row stores a data word that has a valid state or...  
WO/2016/175969A1
A sense amplifier is provided with a pair of first pull-up transistors that are configured to charge a corresponding pair of output terminals while a delayed sense enable signal is not asserted and to stop charging the corresponding pair...  
WO/2016/174524A3
Methods and systems are disclosed related to the processing of video and sensor data recorded by a video camera. For example, a first embodiment is directed to the storage of sensor data in a metadata portion of a digital media file, a s...  
WO/2016/175852A1
In some examples, a memory module includes an error status indicator, an error address register, and error tracking circuitry. The error tracking circuitry may detect that memory data stored at a memory address for the memory module incl...  
WO/2016/175770A1
In an example, a memristor apparatus with variable transmission delay may include a first memristor programmable to have one of a plurality of distinct resistance levels, a second memristor, a transistor connected between the first memri...  
WO/2016/174744A1
Disclosed is a nonvolatile memory control method for controlling a nonvolatile memory having an erase unit and a write unit that differ in size from each other, said nonvolatile memory control method being characterized by mapping physic...  
WO/2016/173141A1
A touch display circuit and a driving method therefor, a touch display panel and a display device. In a touch stage, a touch trigger module (1) supplies a signal of a trigger signal end (Input) to a pull-up node (PU); a first output modu...  
WO/2016/175117A1
A transistor Tr10, which applies OFF potential to a node n1 through a drain terminal during all ON output, is provided in a unit circuit 11 of a shift register. An all ON control signal AON is applied to a gate terminal of the transistor...  
WO/2016/175822A1
A memory cell includes an input coupled to a read line, an output coupled to a circuit ground, a bi-polar memristor, and at least one address switch coupled to an address line to select the memory cell. A memory includes the bi-polar mem...  
WO/2016/175035A1
The present feature pertains to an encoding device and method, a decoding device and method, and a program configured to make it possible to improve the performance of a DC-free code. An encoder encodes an information word into a code wo...  
WO/2016/175744A1
A memristive crossbar array is described. The crossbar array includes a number of row lines and a number of column lines intersecting the row lines to form a number of cross points. A number of memristor cells are coupled between the row...  
WO/2016/175781A1
According lo an example, discrete-lime analog filtering may include receiving an input signal, sampling the input signal to determine sampled input signal values related to the input signal, and using a plurality of resistive random-acce...  
WO/2016/171800A1
A magnetoresistive random-access memory (MRAM) device is disclosed. The device described herein has a spin current injection capping layer between the free layer of a magnetic tunnel junction and the orthogonal polarizer layer. The spin ...  
WO/2016/172227A1
An example playback device may store an active volume state variable in memory, where the active volume state variable corresponds to a current playback volume. The playback device may also store a volume limit state variable in memory, ...  
WO/2016/169541A1
The invention relates to a method and device for improving the sound quality of an audio file in an audio device by modifying an audio signal by means of at least one effect device (1, 2, 3, 4, 5, 6, 7). The method according to the inven...  
WO/2016/171862A1
A read circuit for a memory cell may include an integrated logic circuit for sensing a current change. The integrated logic sensing circuit may be an offset cancelling single ended integrated logic sensing circuit. The circuit may includ...  
WO/2016/171974A1
Apparatuses and methods for reducing a number of command shifters are disclosed. An example apparatus includes an encoder circuit, a latency shifter circuit, and a decoder circuit. The encoder circuit may be configured to encode commands...  
WO/2016/171900A1
A media engine may determine if a received media file is according to a format that includes metadata indicating gap information such as in the header of the file container. If metadata indicating gap information is detected that informa...  
WO/2016/172673A1
A novel 2D/3D hierarchical-BL NAND array with at least one plane on independent Psubstrate comprising a plurality of LG groups respectively associated with a plurality of local bit lines (LBLs) laid at a level below a plurality of broken...  
WO/2016/172431A1
A transducer includes a first piezoelectric layer; and a second piezoelectric layer that is above the first piezoelectric layer; wherein the second piezoelectric layer is a more compressive layer with an average stress that is less than ...  
WO/2016/171065A1
Provided is a glass substrate for a magnetic recording medium, in which, when a 1 μm × 1 μm square region on the main surface of the substrate is divided into 256 circumferential subareas × 256 radial subareas to form 256 × 256 pixe...  
WO/2016/171680A1
An electronic device includes a power pin to receive a power voltage from a power supply. A controller is to determine whether a status signal combined onto the power voltage is received through the power pin, and indicate a health of th...  
WO/2016/171801A1
A method for identifying insertion points for inserting live content into a continuous content stream is disclosed. The method includes identifying a live content item to include in a continuous content stream, and identifying an interes...  
WO/2016/169141A1
A shift register and a drive method therefor, a gate drive apparatus and a display panel, which are used to enable the shift register to use a direct current voltage signal (VDS, VSD) to reduce a voltage of an output terminal (OUTPUT). T...  
WO/2016/172636A1
A dual function hybrid memory cell is disclosed. In one aspect, the memory cell includes a substrate, a bottom charge-trapping region formed on the substrate, a top charge-trapping region formed on the bottom charge-trapping region, and ...  
WO/2016/170714A1
This HDD holding device 10 comprises a base part 11, a plurality of shock-absorbing members, and an HDD mounting part 12 on which an HDD 60 is mounted. The plurality of shock-absorbing members include: a shock-absorbing member 13y which ...  
WO/2016/171819A1
A memory having a redundancy area is operated in a normal mode and an error is detected. A selecting selects between in-line repair process and off-line repair. In-line repair applies a short term error correction, which remaps a fail ad...  
WO/2016/171788A1
In accordance with various embodiments of this disclosure, stray magnetic field mitigation in an MRAM memory such as a spin transfer torque (STT) random access memory (RAM), STTRAM is described. In one embodiment, retention of bitcell bi...  
WO/2016/170527A1
A recording medium is provided, such as paper, secured by magnetic microwires. The recording medium comprises: a pulp structure formed by pulp fibers, said pulp structure carrying microwires having a metal core of a predetermined materia...  

Matches 351 - 400 out of 845,016