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WO/2024/085097A1 |
[Problem] When a magnetic field detection element is formed on an Si substrate, reducing the coil pitch inside an inverted-trapezoidal groove makes it easier for the step at an upper part of the groove or the edge of a bottom surface of ...
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WO/2024/085528A1 |
The present invention relates to a thin-film transistor and a manufacturing method therefor. The thin film transistor comprises: a gate electrode; an active layer spaced apart from the gate electrode; a source electrode provided on one s...
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WO/2024/086458A1 |
A display may include an array of pixels that receive control signals from a chain of gate drivers. The pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. Each ga...
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WO/2024/084621A1 |
In the present invention, an epitaxial layer (2) is formed on a substrate (1). A field effect transistor (3) is formed on the epitaxial layer (2). A drain pad (8) is formed on the epitaxial layer (2). The drain pad (8) is connected to a ...
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WO/2024/086064A1 |
Semiconductor devices and methods of manufacturing the same are described. The method includes forming a source region and a drain region adjacent a superlattice structure on a substrate. The source region and the drain region comprise a...
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WO/2024/082395A1 |
A transistor, a 3D memory and a manufacturing method therefor, and an electronic device, relating to the technical field of semiconductors. The 3D memory comprises multiple layers of memory cells stacked in a direction perpendicular to a...
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WO/2024/084366A1 |
Provided is a semiconductor device that enables miniaturization or higher integration. Provided is an oxide semiconductor suitable for the semiconductor device. Formed is an oxide semiconductor that has a small difference in thickness be...
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WO/2024/084778A1 |
The present invention achieves a high withstand voltage by means of an outer peripheral region having a small width. A semiconductor device according to the present invention comprises: a semiconductor substrate that has an element regio...
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WO/2024/082655A1 |
Provided in the embodiments of the present application are a high electron mobility transistor device and a manufacturing method therefor. The device (100) has a structural unit (10) or at least two structural units (10), which are repea...
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WO/2024/086220A1 |
A metal-oxide-semiconductor (MOS) capacitor can include a substrate comprising a semiconductor material, an oxide layer formed over a first surface of the substrate, a resistive layer formed over at least a portion of the oxide layer, an...
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WO/2024/084910A1 |
According to the present invention, a first main surface has a central measurement region, a first measurement region, a second measurement region, a third measurement region, and a fourth measurement region. When viewed along a straight...
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WO/2024/086163A1 |
N-polar HEMT structures and methods of forming HEMT structures. An example semiconductor device includes a III-N material structure, comprising: a III-N backbarrier layer; a III-N channel layer over an N-face of the III-N backbarrier lay...
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WO/2024/084833A1 |
For example, a semiconductor device 1 includes a semiconductor substrate (N-SUB) of a first conductivity type, a well (P/W) of a second conductivity type different from the first conductivity type that is formed in the semiconductor subs...
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WO/2024/083312A1 |
The disclosure relates to a power MOSFET device (10) having a source terminal, a drain terminal and a gate terminal. The power MOSFET device comprises a drain contact (105) formed at a bottom side (11) of the MOSFET device; a first elect...
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WO/2024/083028A1 |
Provided in the embodiments of the present application is a semiconductor super-junction power device, comprising: an n-type semiconductor layer (21); a plurality of columnar insulating layers (22) recessed in the n-type semiconductor la...
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WO/2024/084438A1 |
A nonvolatile flash memory cell (300) includes a source electrode (306), a drain electrode (308), and a gate column (310). The drain electrode (308) is cylindrical, the gate column (310) is tubular and surrounds the drain electrode (308)...
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WO/2024/082636A1 |
The present invention provides a Schottky barrier diode, comprising: an ohmic electrode layer 4; a second semiconductor layer 32, wherein the lower surface of the second semiconductor layer 32 forms an ohmic contact with the upper surfac...
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WO/2024/086539A1 |
A three-terminal bidirectional GaN FET with a single gate. The device is formed by integrating a single-gate bidirectional GaN FET in parallel with a bidirectional device formed of two back-to-back GaN FETs having a source without a pin-...
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WO/2024/082422A1 |
A method for forming a buried bit line, a memory and a manufacturing method therefor, and an electronic device. The memory comprises a plurality of transistors, and further comprises: a first dielectric layer (41), a second dielectric la...
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WO/2024/084905A1 |
This nitride semiconductor device (10) is provided with: a first nitride semiconductor layer (16); a second nitride semiconductor layer (18) which is formed on the first nitride semiconductor layer (16), and has a larger band gap than th...
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WO/2024/082734A1 |
A semiconductor structure is provided including a backside source/drain contact structure that contacts a source/drain region of a transistor and overlaps a portion of a tri-layered bottom dielectric isolation structure that is located o...
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WO/2024/084652A1 |
A field-effect transistor according to the present invention comprises: a gate (13) formed from a plurality of intersecting electrode wires; a plurality of source electrodes (11); a plurality of drain electrodes (12); and a feed section ...
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WO/2024/083108A1 |
The present application provides an electronic device and a manufacturing method therefor. The electronic device comprises a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a first conductive structu...
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WO/2024/078043A1 |
A display panel, which comprises: a substrate, a multi-layer ohmic contact layer, a multi-layer insulating layer, a semiconductor layer, a gate electrode and a source/drain electrode layer; at least one insulating layer is arranged betwe...
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WO/2024/081401A1 |
A method of forming a semiconductor structure includes forming an epitaxial semiconductor island having a first material characteristic on a base layer, and growing an epitaxial structure from the epitaxial semiconductor island and the b...
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WO/2024/078335A1 |
Disclosed are a semiconductor structure manufacturing method, and a semiconductor structure. The semiconductor structure manufacturing method comprises: providing a substrate; forming a protective layer in a first region of the substrate...
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WO/2024/079585A1 |
Provided is a storage device which allows for miniaturization and high integration. This transistor comprises: a first electric conductor having a columnar region; a first insulator having a cylindrical first region; a second electric co...
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WO/2024/079575A1 |
Provided is a semiconductor device having a novel configuration. This semiconductor device has: a first element layer having a bit line drive circuit; a second element layer having a first switch circuit, a first memory cell, and first w...
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WO/2024/078073A1 |
Disclosed in the present disclosure are a semiconductor device, and a manufacturing method therefor. The semiconductor device comprises: a substrate, a buffer layer, a channel layer and a barrier layer which are stacked successively; a c...
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WO/2024/078125A1 |
A composite trench-type Schottky diode device and a fabrication method therefor. The device comprises a substrate (201), an epitaxial layer (202), a trench structure array (203), a Schottky metal layer (204), a front metal electrode laye...
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WO/2024/079851A1 |
A semiconductor memory device according to an embodiment of the present invention includes: a first chip including a first pillar having a first memory cell and a second memory cell connected in series; a second chip including a second p...
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WO/2024/081947A1 |
Nanowire-based sensors may include an array of nanowires attached to a substrate. The nanowires may have a cladding and are configured to selectively direct incident light into the substrate to interact with surface plasmons at a metal l...
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WO/2024/078637A1 |
Provided in the present invention are a high-voltage-resistance and low-on-resistance IGZO thin-film transistor and a preparation method therefor. Hydrogen ion doping is performed on an IGZO low-resistance drift region of a device, such ...
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WO/2024/078949A1 |
A silicon-based quantum processor is disclosed comprising a plurality of unit cells having respective qudits that can interact with one another, directly or indirectly. Each unit cell comprises a charge reservoir (101) and a plurality of...
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WO/2024/079586A1 |
The present invention provides a semiconductor device which achieves miniaturization or high integration. This semiconductor device comprises a first insulator on a substrate, an oxide semiconductor that covers the first insulator, a fir...
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WO/2024/078688A1 |
The present disclosure relates to a manufacturing method for a power semiconductor device (1, 40), comprising: forming multiple growth templates on a carrier substrate (2), comprising at least a first plurality of hollow growth templates...
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WO/2024/080002A1 |
A semiconductor device (100) comprises a semiconductor substrate (10), an emitter electrode (52), and a polyimide protection film (150). The semiconductor substrate has: an active part (120) that has alternating transistor parts (70) and...
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WO/2024/076890A1 |
Semiconductor devices are provided. In one example, a semiconductor device includes a semiconductor structure having a buried layer at a depth of about 275 Angstroms or greater (e.g., about 500 Angstroms or greater) from a surface of the...
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WO/2024/075432A1 |
Provided is a method for producing a vertical silicon carbide semiconductor device that comprises electrodes on both main surfaces of a semiconductor chip (30) in which an epitaxial layer (2) and a n- type low-concentration buffer layer ...
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WO/2024/076471A1 |
A drive system suitable for motors and the like employs bidirectional FETs with active gate current sourcing and sinking to eliminate series diode losses. In one embodiment, the bidirectional FETs have floating field plates that can be d...
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WO/2024/073818A1 |
There is provided a method for performing one or more quantum operations on a quantum processor. Wherein the quantum processor comprises a plurality of quantum dots in a semiconductor substrate and at least a subset of the quantum dots b...
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WO/2024/074954A1 |
Provided is a semiconductor device having a narrow occupation area. This semiconductor device comprises a first transistor, a second transistor, a first insulating layer, and a second insulating layer. The first transistor comprises a me...
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WO/2024/074936A1 |
Provided is a novel semiconductor device. This semiconductor device has a flip-flop group that includes n flip-flops, and a plurality of storage units. The flip-flop group has a function for saving n bits of data. One of the plurality of...
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WO/2023/245604A9 |
The present disclosure belongs to the technical field of display, and provides a thin-film transistor and a preparation method therefor, and a display device. The thin-film transistor comprises a gate electrode and a first active layer w...
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WO/2024/074968A1 |
Provided is a novel semiconductor device. The present invention comprises a flip-flop circuit and a memory circuit. The memory circuit comprises a first transistor, a second transistor, a first capacitance element, and a second capacitan...
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WO/2024/074967A1 |
Provided is a semiconductor device having a high storage density. This semiconductor device has a first layer and a second layer above the first layer. The first layer has first to fourth conductors, first to fifth insulators, and a firs...
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WO/2024/074073A1 |
A memory device includes a substrate and vertically stacked ferroelectric capacitors formed on the substrate. A first ferroelectric capacitor has a different capacitive output than a second ferroelectric capacitor when a constant voltage...
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WO/2024/075923A1 |
A thin film transistor, a transistor array substrate comprising same, and a method for manufacturing the transistor array substrate, are provided. The thin film transistor comprises: a substrate; an active layer disposed on the substrate...
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WO/2024/075391A1 |
This nitride semiconductor device (10) comprises: a hexagonal SiC substrate (22) having a main surface (22A) inclined at an off angle of 2-6° in a specific crystal direction with respect to the c-plane; a nitride semiconductor layer (24...
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WO/2024/074969A1 |
Provided is a storage device which can be miniaturized and made highly integrated. This storage device has a configuration having a capacitive element formed directly below a vertical transistor, wherein one electrode of the capacitive e...
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