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WO/2023/151690A1 |
The present application provides a field effect transistor and a preparation method therefor, and relates to the technical field of semiconductor devices. The method comprises: providing a first device structure comprising a substrate an...
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WO/2023/154636A1 |
In one general aspect, an apparatus can include a substrate (110, 410) having a semiconductor region (112, 122), and a trench (10, 40) defined in the semiconductor region and having a sidewall. The apparatus can include a shield electrod...
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WO/2023/151889A1 |
A semiconductor device including a first nanosheet device located on a substrate. The first nanosheet device includes a first plurality of nanosheets (115) and each of the first plurality of nanosheets are surrounded by a first dipole. T...
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WO/2023/154155A1 |
A memory structure including three-dimensional NOR memory strings and method of fabrication is disclosed. In some embodiments, a memory structure includes randomly accessible ferroelectric storage transistors organized as horizontal NOR ...
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WO/2023/153286A1 |
In order to provide a spatial light phase modulator that can be miniaturized and that is operable at high speed, each microcell (C) of this spatial light phase modulator (13) is composed of a magnetization free layer (C11) and a control ...
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WO/2023/154046A1 |
A semiconductor device is provided including two or more termination units. Each termination unit can include a via channel, a connection via, floating field rings, a metal plate, and a floating field plate. The floating field rings may ...
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WO/2023/154078A1 |
A method of forming a device on a semiconductor substrate having first, second, third and dummy areas, includes recessing the substrate upper surface in the first, second and dummy areas, forming a first conductive layer over the substra...
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WO/2023/152814A1 |
[Problem] To electrically connect a lead layer and a protective film reliably even when the film thickness of a protective film that covers a functional film is extremely thin. [Solution] After the conductive protective film 51 is formed...
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WO/2023/153091A1 |
The present invention achieves high integration and improves noise resistance. A semiconductor device according to the present invention comprises first and second field effect transistors. Each of the first and second field effect trans...
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WO/2023/154510A1 |
A method of fabricating a heterostructure includes growing epitaxially, in a growth chamber, a first semiconductor layer of the heterostructure, the first semiconductor layer including a first III-nitride semiconductor material, the firs...
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WO/2023/153138A1 |
Provided is a wave control device that can improve the controllability of electromagnetic waves. A wave control device according to the present technology comprises a metamaterial and a magnetic material. In view of the wave control de...
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WO/2023/153131A1 |
[Problem] The present invention addresses the problem of: achieving a large On-state current with use of an indirect transition semiconductor; and suppressing variation in the electrical characteristics among elements. [Solution] The pre...
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WO/2023/151950A1 |
A stacked semiconductor device includes a lower semiconductor device that has a backside and includes a flipped upper semiconductor device that has a backside that is opposed to the lower semiconductor device backside. The flipped upper ...
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WO/2023/153509A1 |
The present invention comprises: first gate insulation layer 21 which is provided with a flat part that follows a flat surface of a flexible base 11 and a step part 22 that covers a gate electrode layer 12 and that protrudes from the fla...
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WO/2023/149336A1 |
This semiconductor device 100 comprises a semiconductor substrate 110, a plurality of trenches 120, a gate insulation film 122, a gate electrode 124, an interlayer insulation film 130, and a surface electrode 140. The semiconductor subst...
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WO/2023/148015A1 |
A MOSFET includes a semiconductor substrate, which has a body and an upper layer. The upper layer is doped differently than the body. The body and the upper layer are of a same crystal structure and orientation. The MOSFET also includes ...
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WO/2023/150492A1 |
A power semiconductor device includes a semiconductor layer structure comprising a drift region of a first conductivity type, and first and second contacts on the semiconductor layer structure. The drift region comprises a wide bandgap s...
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WO/2023/149636A1 |
A perovskite composite comprising antimony trifluoride, an electronic element comprising same, and a preparation method therefor are disclosed. The perovskite composite comprises tin (Sn)-based perovskite and antimony trifluoride (SbF3) ...
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WO/2023/149131A1 |
According to the present invention, a p-type impurity concentration profile (41) in the depth direction of a p-type base region is controlled by means of ion implantation into the p-type base region in two or more stages. The ion implant...
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WO/2023/149105A1 |
According to the present invention, a wiring line 31 and a wiring line 32 of a display device DSP2 each comprise: a metal wiring part 30A which is formed of a first metal material that is copper or a copper alloy; and a metal wiring part...
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WO/2023/150021A1 |
A device includes a first plurality of MEOL interconnects coupled to a second node that extends in a first direction. The first plurality of MEOL interconnects includes first and second subsets of MEOL second-terminal interconnects. The ...
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WO/2023/149187A1 |
The present disclosure relates to a vertical transistor, a light detection device, and an electronic apparatus that make it possible to obtain improved transistor characteristics in a vertical transistor. This vertical transistor is prov...
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WO/2023/148196A1 |
The present invention relates to a non-volatile field-effect transistor (10), comprising: - a gate electrode including a first contact (C1); - a source (14) comprising a second contact (C2); - a drain (16) including a third contact (C3);...
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WO/2023/148574A1 |
Provided is a semiconductor device that enables miniaturization and a high level of integration. The semiconductor device has: a memory cell having a transistor and a capacitive element; a first insulator; and a second insulator on the f...
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WO/2023/149447A1 |
The present invention addresses the problem of providing an etching solution composition that imparts a good etched surface shape to a metal to be etched at a controlled etch rate. The present invention relates to an etching solution c...
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WO/2023/148799A1 |
A substrate has formed thereon a first semiconductor layer 1, a part of which has disposed thereon a first impurity layer 3 extending vertically, and a second semiconductor layer 4 is disposed on top of the first impurity layer. The side...
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WO/2023/148210A1 |
The invention relates to a two-dimensional electron gas field-effect transistor, referred to as TEGFET, comprising a drain (3), a source (4) and at least one channel (6) included in a heterostructure formed by a stack of at least two sem...
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WO/2023/150062A1 |
The description generally relates to a bird's beak profile of a field oxide region. In an example, a semiconductor device structure includes a semiconductor substrate (202), a dielectric oxide layer (204), and a field oxide region (206)....
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WO/2023/149043A1 |
This method for manufacturing a switching device (10) includes: a step for forming a source region (30) and a body region (34) in a semiconductor substrate (12) having a drift region (38); a step for forming a mask (50) that has openings...
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WO/2023/148571A1 |
Provided is a semiconductor device configured to allow miniaturization or an advanced degree of integration. This semiconductor device includes a first transistor and a second transistor on an insulating surface. The first transistor and...
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WO/2023/145256A1 |
[Problem] To further enhance driving capability regardless of the miniaturization of a fin structure. [Solution] A semiconductor device comprises: a channel layer extending from a main surface of a substrate in a direction normal to the ...
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WO/2023/145317A1 |
A semiconductor module (10) comprises: a first chip (20) that includes a main transistor (21) including an electron transit layer which serves as a main drift layer (24); a second chip (30) that includes at least a part of an active clam...
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WO/2023/145316A1 |
A semiconductor device according to the present invention comprises: a semiconductor substrate; a GaN transistor that is formed upon the semiconductor substrate and includes a drain electrode, a source electrode, and a gate electrode; an...
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WO/2023/142050A1 |
Sensing devices as well as methods of making and using the same. The sensing devices may include a pedestal (360,66,760) having a sensing element assembly (302) associated therewith and a port assembly (370,406,770) configured to mate wi...
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WO/2023/144653A1 |
Provided is a novel storage device. Provided is a storage device in which N layers (N is an integer of 2 or more) of a storage layer are stacked, the storage layer including a plurality of memory cells disposed in a matrix shape. A bit l...
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WO/2023/145497A1 |
The present invention provides a field effect transistor which comprises a base material that has a glass transition temperature of 250°C or less and an oxide semiconductor layer that is provided on the base material. The oxide semicond...
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WO/2023/146194A1 |
The present invention relates to a substrate processing device comprising: a first source supply unit for supplying a first source gas; a second source supply unit for supplying a second source gas; a first supply line for connecting the...
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WO/2023/141749A1 |
A semiconductor device having improved leakage current characteristics includes a semiconductor substrate with first and second nitride-based semiconductor layers so as to form a heterojunction therebetween with a two-dimensional electro...
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WO/2023/142393A1 |
The present invention relates to the technical field of power semiconductor devices, and relates to a high-speed flyback diode-integrated silicon carbide split gate MOSFET and a preparation method therefor. The MOSFET of the present inve...
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WO/2023/145910A1 |
Provided are a laminated structure in which there is reduced deterioration at high temperatures and which is particularly useful for power devices, a semiconductor element, and a semiconductor device. The laminated structure comprises at...
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WO/2023/145071A1 |
This semiconductor device (100) comprises a semiconductor substrate (1), a plurality of element trenches (ET), and a plurality of terminal trenches (TT). The semiconductor substrate (1) has an element region (1a) and a terminal region (1...
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WO/2023/145912A1 |
The present invention provides: a multilayer structure which is reduced in deterioration at high temperatures and is useful especially for power devices; a semiconductor element; and a semiconductor device. The present invention provides...
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WO/2023/147266A1 |
Described herein are lateral III-N (e.g., GaN) devices having a III-N depleting layer. A circuit includes a depletion-mode transistor with a source connected to a drain of an enhancement-mode transistor. The gate of the depletion-mode tr...
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WO/2023/145805A1 |
Provided is a semiconductor device in which doping concentration peaks in a buffer region each have an apex at which the doping concentration shows a maximum, a lower tail in which the doping concentration monotonously decreases from the...
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WO/2023/143626A1 |
A semiconductor device is provided. For example, the semiconductor device can include a plurality of transistors that are arranged in an array in an X-Y plane. Each of the transistors can include a channel extending in Z direction. The s...
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WO/2023/144654A1 |
Provided is an electronic device or a semiconductor device with which it is possible to achieve miniaturization or high integration. The electronic device comprises a first electrical conductor, a second electrical conductor, a first ins...
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WO/2023/146248A1 |
The present invention relates to a thin film manufacturing method and a thin film. The thin film manufacturing method comprises: an adsorption step of adsorbing a high-k material on a substrate by spraying a source gas consisting of a hi...
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WO/2023/141993A1 |
An enhancement method for a hole linear Rashba spin-orbit coupling effect, relating to the technical field of semiconductors. The method comprises: one or more silicon atom layers are inserted into an interface on the basis of a traditio...
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WO/2023/145911A1 |
Provided are a layered structure, a semiconductor element, and a semiconductor device that are particularly useful in power devices and undergo less degradation at high temperatures. According to the present invention, a layered structur...
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WO/2023/144999A1 |
A topological insulator according to the present invention contains a first material, the electrical properties of which change in accordance with the width, while having a first region that extends in a first direction and a second regi...
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