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WO/2023/189055A1 |
This semiconductor apparatus comprises: a chip that has a first main surface as a device surface and a second main surface as a non-device surface; and a drift slope region of a first conductivity type that is formed in the chip and has ...
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WO/2023/184231A1 |
The present disclosure relates to the technical field of display, and provides a metal oxide thin film transistor, a semiconductor device, and a display apparatus, capable of solving the problem of poor stability of existing metal oxide ...
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WO/2023/187543A1 |
The present invention provides a display device less susceptible to noise. This display device comprises a signal line drive circuit, a demultiplexer circuit, and pixels. The demultiplexer circuit has a transistor in which a semiconducto...
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WO/2023/187544A1 |
A semiconductor device with high recording density is adopted. The device has first and second transistors, first and second conductors, and first through third insulators. In the first transistor, a semiconductor layer is located above ...
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WO/2023/189754A1 |
This semiconductor device comprises: a chip having a first surface on one side and a second surface on the other side; a plurality of IGBT regions provided on the chip so as to be spaced apart from each other; a boundary region provided ...
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WO/2023/189082A1 |
A semiconductor device (100) in which a gate electrode (140) includes a junction portion (141) forming a Schottky junction with a barrier layer (104), and a protruding portion (142d) protruding further than the junction portion (141). An...
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WO/2023/189674A1 |
Provided is a resonant-tunneling diode and a terahertz oscillator enabling further performance improvement. The resonant-tunneling diode comprises: a multiple quantum well structure composed of a group III nitride semiconductor; a first ...
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WO/2023/189058A1 |
A SiC Semiconductor device (1A) includes: a chip (2) that contains a SiC single crystal and has a principal surface (3); a trench structure (20) that is formed on the principal surface and that has a first side wall (22A) extending in an...
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WO/2023/189003A1 |
A thin film transistor according to the present invention comprises a substrate, an oxide semiconductor layer which is provided on the substrate and has crystallinity, a gate electrode which is superposed on the oxide semiconductor layer...
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WO/2023/184199A1 |
A nitride-based semiconductor device includes III-V nitride-based buffer layer, a first III-V nitride-based semiconductor layer, and second III-V nitride-based semiconductor layer. The III-V nitride-based buffer layer is disposed over a ...
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WO/2023/189834A1 |
Provided is a spattering target (1) comprising an oxide sintered compact including an In element, a Ga element, and an O element. Said sintered compact includes a crystal structure represented by In2O3, the atomic composition ratio of th...
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WO/2023/189039A1 |
This nitride semiconductor device (10) comprises: an electron transit layer (16); an electron supply layer (18) provided on the electron transit layer (16); a gate layer (22) provided on the electron supply layer (18); a gate electrode (...
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WO/2023/186498A1 |
The invention relates to a composite structure for manufacturing microelectronic components, comprising a monocrystalline thin film disposed on a polycrystalline silicon carbide support substrate, said support substrate having a preferre...
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WO/2023/188559A1 |
Provided are: a semiconductor device with which it is possible to form a Schottky barrier diode in a diode unit of a RC-IGBT and to perform low injection of the diode unit by a simpler process than conventional; a method for manufacturin...
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WO/2023/189014A1 |
Provided is a semiconductor film comprising a solid-phase crystallized product of an indium oxide doped with tin and hydrogen.
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WO/2023/181442A1 |
A treatment method of a power semiconductor module comprising at least one semiconductor element including a Metal-Oxide-Semiconductor element and/or a Metal-Insulator-Semiconductor element, said method comprising: a. acquiring a first v...
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WO/2023/178755A1 |
Embodiments of the present disclosure relate to the field of semiconductors, and provide a semiconductor structure and a forming method. The forming method comprises: providing a substrate (100); performing first oxidation treatment on a...
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WO/2023/178683A1 |
The present application relates to the technical field of semiconductors. Provided in the present application are a high electron mobility transistor, a Doherty power amplifier and an electronic device. The present application uses novel...
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WO/2023/182099A1 |
This field effect transistor has: a substrate having a (111) plane, the substrate comprising a group IV semiconductor doped with a first electroconductivity type; a core-shell nanowire including a core nanowire connected to the (111) pla...
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WO/2023/181588A1 |
[Problem] To lower the on-resistance of a junction barrier Schottky diode in which a gallium oxide is used. [Solution] A junction barrier Schottky diode 1 comprises: a semiconductor substrate 20 and a drift layer 30 that are formed from ...
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WO/2023/181998A1 |
This method for manufacturing a hall element 18 comprises: a step for forming a perovskite-type magnetic layer 14 on a substrate 12 comprising a compound that has a perovskite structure and a lattice constant of 3.90-3.97 Å in pseudo-cu...
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WO/2023/179411A1 |
The present application relates to the technical field of semiconductors. Provided are a semiconductor device and a preparation method therefor, and an electronic device, which are used for solving the problem of semiconductor device sur...
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WO/2023/178684A1 |
Embodiments of the present application provide a gallium nitride field effect transistor structure and a preparation method. The complementary field effect transistor structure comprises: a substrate; a first epitaxial structure disposed...
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WO/2023/181587A1 |
[Problem] To increase the surge resistance of a junction barrier Schottky diode in which a gallium oxide is used. [Solution] A junction barrier Schottky diode 1 comprises: a semiconductor substrate 20 and a drift layer 30 that are formed...
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WO/2023/181460A1 |
A method for producing a semiconductor device (1), said method involving: a step for forming a first groove (71) of a depth H in a semiconductor layer (40); a step for filling the first groove (71) with an oxide film, and forming a surfa...
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WO/2023/180859A1 |
The present invention has a first memory cell, a second memory cell on the first memory cell, a first conductor, and a second conductor on the first conductor, the first memory cell and the second memory cell each having a transistor, a ...
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WO/2023/183147A1 |
A power transistor device includes a drift layer having a first conductivity type and a mesa on the drift layer. The mesa includes a channel region on the drift layer, a source layer on the channel region and a gate region in the mesa ad...
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WO/2023/178866A1 |
Disclosed herein are a silicon carbide device and a fabrication method therefor. The silicon carbide device comprises: an n-type silicon carbide layer; a plurality of gate trenches located in the n-type silicon carbide layer; a first gat...
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WO/2023/182376A1 |
In this semiconductor device: each of a source that is formed on a main surface of a semiconductor substrate and a floating gate that contacts the main surface with an insulating film therebetween is provided adjacent to a capacitive ele...
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WO/2023/180849A1 |
Provided is a semiconductor device that can be miniaturized or highly integrated. According to the present invention, a semiconductor device includes a metal oxide, a first conductor and a second conductor that are on the metal oxide, a ...
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WO/2023/183215A1 |
A power semiconductor device includes a semiconductor layer structure comprising a drift region of a first conductivity type, and a gate trench extending into the drift region. The gate trench includes sidewalls and a bottom surface ther...
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WO/2023/178895A1 |
A manufacturing method for a silicon carbide device provided by the embodiments of the present application, comprising: forming a hard mask layer on an n-type silicon carbide layer, defining positions of gate trenches by means of a photo...
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WO/2023/181801A1 |
When the thickness of a Si substrate is denoted by dt [cm], the resistance of the Si substrate is denoted by ρs [Ω・cm], the width of each trench is denoted by Wt [cm], the thickness of a first electrode formed on the side surfaces of...
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WO/2023/181749A1 |
In the present invention, a semiconductor device (100) comprises: a substrate (101); a back barrier layer (103); a channel layer (104) having a smaller bandgap than that of the back barrier layer (103); a first barrier layer (105) having...
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WO/2023/181172A1 |
According to the present invention, there is a p layer 1 that is a semiconductor matrix, there is an n+ layer 2 that extends to one side, there is a second impurity layer n+ layer 3 that is in contact with the p layer 1 on the side oppos...
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WO/2023/182822A1 |
Disclosed are a power semiconductor device having a withstand voltage region of a VLD structure, and a method for manufacturing same. The method for manufacturing a power semiconductor device comprises the steps of: deforming an oxide fi...
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WO/2023/178865A1 |
Disclosed is a semiconductor super-junction power device, comprising: an n-type drain region; an n-type drift region located above the n-type drain region; and a plurality of p-type pillars, an electrical charge balance structure being f...
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WO/2023/179993A1 |
A stacked field-effect transistors (FETs) layout and a method for fabrication are provided. The stacked FETs include a buried interconnect within the stacked devices which provides power to buried components without requiring a wired con...
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WO/2023/178897A1 |
Embodiments of the present application provide a silicon carbide device terminal structure, comprising: an n-type silicon carbide layer; a first trench located in the n-type silicon carbide layer and at least one second trench located on...
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WO/2023/183495A1 |
A cache circuit for use in a computing system includes at least one random-access memory (RAM) and at least one directory coupled to the RAM. The RAM includes multiple memory cells configured to store data, comprising operands, operators...
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WO/2023/176760A1 |
[Problem] To provide a laminate structure that has excellent crystallinity, a semiconductor device, and methods by which it is possible to produce the same in an industrially advantageous manner. [Solution] The present invention involves...
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WO/2023/173919A1 |
The present application provides a semiconductor device and a preparation method therefor, an integrated circuit, and an electronic device. The semiconductor device comprises a drain electrode, a base substrate, an epitaxial layer, and a...
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WO/2023/175422A1 |
Provided is a semiconductor device comprising a first conductor (233a1), a second conductor (231), a first transistor (201) on a first insulator, and a second insulator (282) on the first transistor. The first transistor comprises a thir...
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WO/2023/176373A1 |
This semiconductor device (10) includes first and second gate portions (24A, 24B) formed of a semiconductor layer containing acceptor-type impurities. First and second gate electrodes (26A, 26B) are disposed on portions of the first and ...
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WO/2023/173482A1 |
A memory, a semiconductor structure and a preparation method therefor, which relate to the technical field of semiconductors. The preparation method comprises: providing a substrate, wherein the substrate comprises an array region and a ...
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WO/2023/173504A1 |
Provided in the embodiments of the present disclosure are a semiconductor structure and a manufacturing method therefor, and a memory and a manufacturing method therefor. The semiconductor structure comprises at least one transistor, whi...
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WO/2023/176312A1 |
A semiconductor device (100) for high-frequency amplification according to the present invention is provided with: a substrate (101); a first nitride semiconductor layer (103), a two-dimensional electron gas layer (105) and a second nitr...
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WO/2023/177157A1 |
The present invention relates to a thin film transistor and a manufacturing method therefor, and, more specifically, to a thin film transistor having improved characteristics and a manufacturing method therefor. The thin film transistor ...
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WO/2023/173836A1 |
Disclosed in the present invention are an enhanced GaN-based HEMT device, and a manufacturing method therefor and a use thereof. The composition of the enhanced GaN-based HEMT device of the present invention comprises a substrate, a firs...
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WO/2023/176118A1 |
A semiconductor device (10) is provided with: a semiconductor layer (12); a gate trench (14) that is formed in the semiconductor layer (12) and arranged in a mesh shape in plan view; a field plate trench (42) that is formed in the semico...
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