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WO/2023/161387A1 |
An integrated circuit (IC) device comprises a metal-oxide-semiconductor (MOS) transistor comprising a heavily doped (HD) drain region, a gate stack, a drain region extension extending in a lateral direction from the HD drain region to an...
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WO/2023/162927A1 |
A storage device (1) according to one embodiment of the present disclosure is provided with: a storage element and a reference element each including a fixation layer having a fixed magnetization direction, a storage layer having a chang...
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WO/2023/161360A1 |
The present inventive concept relates to a spin qubit transistor (100) comprising a base layer (102), a first qubit comprising, a first computing semiconductor island (106) and a first readout semiconductor island (108) arranged with a d...
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WO/2023/159405A1 |
Provided are a circuit board and a manufacturing method therefor, a functional backplane, a backlight module, a display device, and a display panel. The circuit board comprises: a base substrate; a trace, which is provided on the base su...
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WO/2023/159681A1 |
Disclosed in the present application is a thin film transistor, comprising a flexible substrate, a shielding layer, a buffer layer and an active layer, wherein the shielding layer and the buffer layer are arranged between the flexible su...
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WO/2023/163697A1 |
The present disclosure provides a terahertz (THz) transceiver including a triple-barrier resonant tunneling diode (TBRTD), a resonator antenna electrically connected to an emitter and a collector of the TBRTD, and a radiator antenna disp...
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WO/2023/164071A1 |
A device includes a substrate, a heterostructure supported by the substrate, the heterostructure including a semiconductor layer supported by the substrate, and a ferroelectric III-nitride alloy layer supported by the semiconductor layer...
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WO/2023/161388A1 |
An integrated circuit device comprises a metal-oxide-semiconductor (MOS) transistor comprising a gate stack formed over a channel region thereof and a bipolar junction transistor (BJT) comprising a layer stack formed over a collector reg...
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WO/2023/162849A1 |
The present invention provides a sputtering target which is configured from an oxide sintered body that contains an oxide of the formula below containing indium, magnesium and tin. In the formula, X is 0.32 to 0.65; Y is 0.17 to 0.46; Z ...
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WO/2023/163745A1 |
Embodiments of the disclosure provide methods and electronic devices comprising a work function layer comprising a material that forms a conductive oxide with or without titanium. The electronic devices comprise a silicon layer with the ...
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WO/2023/156866A1 |
Provided is a storage device that enables miniaturization and high integration. The storage device has a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first capacitor has a firs...
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WO/2023/156998A1 |
The technology disclosed herein concerns a process for fabricating devices with Graphene Nanogap Electrodes (GNE).
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WO/2023/156869A1 |
The present invention provides a semiconductor device which enables miniaturization or high integration. A semiconductor device according to the present invention comprises a first conductor, a second conductor, a first insulating body, ...
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WO/2023/157374A1 |
[Problem] To provide a laminate having a buffer layer on a group 13 element nitride single crystal, a channel layer having a thickness of 700 nm or less on the buffer layer, and a barrier layer on the channel layer, wherein decreases in ...
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WO/2023/156287A1 |
A semiconductor structure includes a semiconductor channel structure that has a body and a tip and a dielectric spacer adjacent to the tip. The tip is no less than 70% the thickness of the body.
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WO/2023/158690A1 |
Semiconductor devices and methods of manufacturing the same are described. The method includes forming distinct and separate bottom dielectric isolation layers underneath the source/drain and underneath the gate of a gate all around devi...
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WO/2023/155261A1 |
The present application discloses an array substrate and a display panel. The array substrate comprises a plurality of pixel units arranged in an array; each pixel unit comprises a thin film transistor; the thin film transistor comprises...
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WO/2023/155085A1 |
Disclosed are a semiconductor material, a light-emitting device, a display panel, and a display device. The semiconductor material comprises: at least two among an oxide of a first element, an oxide of a second element, an oxide of a thi...
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WO/2023/155091A1 |
A metal oxide thin film transistor, an array substrate, and a display device, relating to the technical field of display, and capable of solving the problem of poor stability of existing metal oxide thin film transistors. The metal oxide...
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WO/2023/157395A1 |
A semiconductor device according to the present invention comprises: a chip which has a main surface; an IGBT region which is formed in the main surface; a diode region which is formed in the main surface; an insulating film which is for...
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WO/2023/156263A1 |
There is provided a transistor comprising: a graphene layer structure provided on a non-metallic surface of a substrate, the graphene layer structure having an insulating cap; a source contact provided in contact with a first edge of the...
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WO/2023/158688A1 |
Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which comprise an integrated dipole region to meet reduced th...
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WO/2023/157422A1 |
This semiconductor device comprises: a chip having a main surface; a first conductivity-type base region formed on the surface layer part of the main surface; a trench gate structure formed on the main surface so as to penetrate through ...
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WO/2023/156876A1 |
The present invention provides a semiconductor device having a transistor of very small size. The semiconductor device comprises: a semiconductor layer; a first electrically conductive layer; a second electrically conductive layer; a thi...
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WO/2023/155584A1 |
The present invention relates to an insulated gate bipolar transistor, a manufacturing method, an electronic device, and a storage medium. The method comprises: providing a substrate, and sequentially providing an oxide layer and an epit...
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WO/2023/157658A1 |
A silicon carbide epitaxial substrate that has a silicon carbide substrate and a silicon carbide layer positioned on the silicon carbide substrate. The silicon carbide layer includes a first region and a second region that is surrounded ...
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WO/2023/157330A1 |
Provided is a semiconductor device comprising: a first conductivity type drift region provided on a semiconductor substrate having a front surface and a reverse surface; and a first conductivity type or second conductivity type reverse-s...
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WO/2023/158689A1 |
Semiconductor devices and methods of manufacturing the same are described. The method includes forming a diffusion break opening on the backside and filling with a diffusion break material to service as a planarization stop. In some embo...
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WO/2023/156875A1 |
Provided is a semiconductor device that enables miniaturization and high integration. This storage device has a first transistor, a second transistor, a first capacitor, and a second capacitor. The first capacitor has a first electrode a...
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WO/2023/157495A1 |
This nonvolatile storage device comprises: a first memory cell; first wiring laminated on the first memory cell, the first wiring extending in a first direction and being electrically connected to the first memory cell; second wiring lam...
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WO/2023/157620A1 |
The present disclosure relates to an electronic apparatus and a solid-state imaging device that make it possible to suppress the gate capacity in a transfer transistor having a vertical gate electrode structure. The solid-state imaging d...
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WO/2023/156883A1 |
Provided is a semiconductor device that enables miniaturization and high integration. This semiconductor device has a memory cell including first to third transistors and a capacitor. The second and third transistors share a metal oxide....
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WO/2023/155585A1 |
The present disclosure relates to an insulated gate bipolar transistor and a manufacturing method therefor, an electronic device and a storage medium. The structure of the insulated gate bipolar transistor manufactured by means of the ma...
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WO/2023/157400A1 |
Provided is a spatial light modulator capable of miniaturizing cell size and reducing the loss associated with the miniaturization. A spatial light modulator (SLM) is equipped with: a plurality of microcells (C) with a cell size of less ...
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WO/2023/156877A1 |
Provided is a semiconductor device that enables miniaturization or high integration. The semiconductor device comprises a first memory cell, a second memory cell on the first memory cell, a first conductor, and a second conductor on the ...
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WO/2023/157452A1 |
A nitride semiconductor device (10) includes an electron transit layer (16), an electron supply layer (18), a gate layer (22) containing acceptor impurities, a gate electrode (24), a passivation layer (26), a source electrode, a drain el...
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WO/2023/157626A1 |
A semiconductor device according to the present invention comprises: a semiconductor layer; a first wiring line and a second wiring line, which are formed on the semiconductor layer; an insulating layer that has a first opening from whic...
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WO/2023/155917A1 |
Disclosed in the present application are a double-gate transistor, a pixel driving circuit and a display panel. The double-gate transistor comprises: a first gate electrode, a first electrode and a second electrode, wherein the first gat...
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WO/2023/157048A1 |
In the present invention, a first insulating layer 1 is on a substrate 40, a first metal wiring layer 2 and a fourth metal wiring layer 3 are embedded in the insulating layer, a second metal wiring layer 4 abuts the metal wiring layer 2 ...
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WO/2023/157627A1 |
[Problem] To provide a comparator, a light detection element, and an electronic apparatus in which noise can be reduced. [Solution] Provided is a comparator that compares a signal with a reference signal to output a comparison result, th...
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WO/2023/157972A1 |
This silicon carbide semiconductor substrate comprises: a first-conductive type silicon carbide semiconductor substrate (1); a first-conductive type first semiconductor layer (2) having an impurity concentration lower than that of the si...
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WO/2023/156158A1 |
The present invention relates to a transistor (10), in particular a wide bandgap semiconductor power transistor (40), comprising an epitaxial layer (11) of a first conductivity type, at least one well region (13) of a second conductivity...
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WO/2023/158934A1 |
A die includes fins extending in a first direction, a gate formed over the fins, the gate extending in a second direction that is perpendicular to the first direction, a first source/drain contact layer formed over the fins and extending...
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WO/2023/152586A1 |
Provided is a semiconductor device that is configured to allow miniaturization and high integration. This semiconductor device includes a memory cell including first to third transistors and a capacitor. The first to third transistors ea...
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WO/2023/151133A1 |
A memory cell structure, a memory array structure, a semiconductor structure and a manufacturing method therefor. The memory cell structure comprises a substrate, an active region, a word line structure, an insulating dielectric layer an...
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WO/2023/152588A1 |
Provided is a semiconductor device capable of achieving a high-integrated or minute arrangement. In the present invention, a first transistor and a second transistor both have, in a shared manner, a first metal oxide disposed on a first ...
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WO/2023/153027A1 |
Provided is a highly reliable semiconductor device that has low conduction loss and switching loss, and that can achieve an increase in turn-off cut-off resistance. The semiconductor device comprises a switching gate and a carrier contro...
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WO/2023/152595A1 |
Provided is a storage device that enables miniaturization or high integration. Provided is a storage device comprising a memory cell which includes a transistor and a capacitive element, a first insulator, a second insulator on the first...
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WO/2023/153154A1 |
Provided is a group III element nitride semiconductor substrate having a first surface and a second surface, and capable of suppressing variations in the characteristics of an element formed on the substrate. A group III element nitride ...
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WO/2023/153065A1 |
According to the present invention, a magnetoresistance effect laminate is formed by layering, in order, a fixed magnetization layer that has a magnetization that is fixed in a constant direction that is parallel to the layering directio...
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