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WO/2023/167749A1 |
A process of forming an electronic device can form an accumulation channel or an integrated diode by selective doping parts of a workpiece. In an embodiment, a doped region (644) can be formed by implanting a sidewall of a body region (7...
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WO/2023/165113A1 |
A storage unit and a manufacturing method therefor, and a semiconductor device. The storage unit comprises: a conductive substrate, which has an upper surface, wherein a first hole is located in the conductive substrate; the first hole, ...
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WO/2023/167147A1 |
This silicon carbide semiconductor device comprises: an n-type drift region; a p-type body region; an n-type source region; a p-type contact region; a gate trench that extends in a first direction; a gate insulating film; a gate electrod...
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WO/2023/166377A1 |
Provided is a storage device that enables miniaturization or high integration. This storage device comprises: a memory cell that includes a capacitive element and a transistor on the capacitive element; a first insulator on the capacitiv...
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WO/2023/167161A1 |
In the present invention, a second MOSFET comprises: a body region; a drain region extending in the y direction; a first well region formed away from the drain region in the x direction; a gate electrode formed on a gate insulating film ...
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WO/2023/166378A1 |
Provided is a semiconductor device capable of being miniaturized or highly integrated. This semiconductor device has first and second transistors, and a capacitor. The first transistor is provided in the same layer as the second transist...
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WO/2023/166608A1 |
According to the present invention, Si base materials 24aa-24ad, 24ba-24bd and 45a-45d are arranged to be adjacent to each other in the horizontal direction at regular intervals, while being parallel to a substrate 20. In addition, gate ...
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WO/2023/165000A1 |
The present disclosure provides a semiconductor structure and a method for manufacturing the semiconductor structure. The semiconductor structure comprises: a substrate having a first area and a second area; a first gate structure locate...
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WO/2023/167083A1 |
Provided is an effective structure for an electrostatic discharge (ESD) protection circuit in which a nanosheet device is used. A device structure (21) that constitutes one of an anode or a cathode is disposed opposite a device structure...
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WO/2023/165341A1 |
A channel etching method, comprising providing an object to be etched, and after the object to be etched is subjected to primary etching, alternately performing surface treatment and secondary etching until sacrificial layers of all fin ...
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WO/2023/164813A1 |
A source/drain confined epitaxy method for a gate-all-around device, the method comprising: forming on a substrate (105) several fin structures which are arranged in a first direction, and forming on the several fin structures several du...
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WO/2023/166374A1 |
Provided is a semiconductor device that can be miniaturized or highly integrated. The semiconductor device is provided with a memory cell having a transistor and a capacitor. Either the source electrode or the drain electrode of the tran...
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WO/2023/165242A1 |
Disclosed in the present application are a SiC MOSFET and a preparation method therefor, and an integrated circuit. In the SiC MOSFET, a gate electrode is located at two sides of a fin-shaped channel layer. Arranging the gate electrode a...
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WO/2023/166379A1 |
Provided is a novel semiconductor device. In the semiconductor device, a lateral channel transistor and a vertical channel transistor are combined. A p-channel transistor is composed of the lateral channel transistor, and an n-channel tr...
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WO/2023/164821A1 |
The semiconductor device includes a substrate, a first and a second nitride-based semiconductor multiple layered structures, a first and a second conductive layers. The substrate has a device region and a peripheral region that encloses ...
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WO/2023/166666A1 |
This semiconductor device comprises: a field insulating film (10) that contacts a first gate electrode (9) formed in a termination trench (7) and is formed from the inside to the outside of the termination trench (7) while covering the t...
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WO/2023/166707A1 |
This neuromorphic device has a plurality of paired elements, and a control device that controls each of the plurality of paired elements. Each of the plurality of paired elements includes a first magnetoresistive element, a second magnet...
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WO/2023/165283A1 |
Provided in the embodiments of the present application are a memory having a tunneling field effect transistor (TFET), and an electronic device comprising the memory which has the TFET. The present application relates to the technical fi...
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WO/2023/166657A1 |
The present invention inhibits electric potential variation during a switching operation and prevents an increase in switching loss. This semiconductor device comprises: a first semiconductor layer; a gate trench; a first well region; a ...
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WO/2023/161383A1 |
An integrated circuit (IC) device configured for voltage reduction between an input and an output comprises a plurality of alternatingly doped regions arranged laterally in a lateral direction and alternatingly doped with dopants of oppo...
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WO/2023/163855A1 |
Self-aligned FET devices and associated fabrication methods are disclosed herein. A disclosed process for forming a FET includes forming a first mask, implanting a deep well region in a drift region using the first mask, forming a spacer...
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WO/2023/159390A1 |
Embodiments of the present disclosure relate to a semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a source and a drain, each having a first doping type; a gate located between the source and ...
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WO/2023/163023A1 |
Provided is a composition containing a quantum dot material having a perovskite crystal structure and an olefin polymer. The olefin polymer is preferably a cyclic olefin polymer or a block copolymer containing repeating units derived fro...
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WO/2023/164157A1 |
Apparatuses, systems, and methods are disclosed for an integrated circuit (100) with 2D field-effect transistors (110) and on-chip thin film layer deposition with electrical characterization. A corresponding layer structure and manufactu...
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WO/2023/162448A1 |
The present invention is a radio-frequency device substrate characterized by comprising: a support substrate which has an uneven surface; a diamond layer on the surface of the support substrate; and a silicon oxide film layer on the diam...
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WO/2023/162294A1 |
This semiconductor device comprises: a MOSFET 1Q; and a cutoff function circuit for detecting overcurrent flowing through the MOSFET 1Q and limiting the overcurrent. The cutoff function circuit includes MOSFETs 2Q and 3Q, a resistive ele...
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WO/2023/162036A1 |
According to the present invention, a dynamic flash memory cell and a fin transistor are formed on a P-layer substrate 10a. The dynamic flash memory cell comprises, on the P-layer substrate 10a: a first insulating layer 11a; a fin P-laye...
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WO/2023/161384A1 |
An integrated circuit (IC) device comprises a lateral bipolar junction transistor (BJT) comprising an emitter region formed in a base well and a heavily doped collector region separated in a lateral direction from the base well by a drif...
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WO/2023/163743A1 |
Embodiments of the disclosure provide methods and electronic devices comprising a work function layer comprising a material that does not form a silicide. The electronic devices comprise a silicon layer with the work function layer there...
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WO/2023/161389A1 |
An integrated circuit device comprises a lateral bipolar junction transistor comprising an emitter region formed in a base well and a heavily doped collector region separated in a lateral direction from the base well by a drift region do...
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WO/2023/162039A1 |
A first insulating layer 1 is provided on a substrate 50. A first metal wiring layer 2 is embedded in the insulating layer. A second metal wiring layer 3 is in contact with the metal wiring layer 2 and extends in a direction perpendicula...
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WO/2023/162521A1 |
A nitride semiconductor device 1 comprises: a SiC substrate 2 having a first main surface 2a and a second main surface 2b opposite thereto; a low-resistance SiC layer 3 formed on the first main surface 2a and having a lower resistivity t...
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WO/2023/162121A1 |
This magnetized rotary element comprises: spin-orbit torque wiring; and a first ferromagnetic layer connected to the spin-orbit torque wiring, wherein the spin-orbit torque wiring includes a topological insulator in which conductors are ...
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WO/2023/164112A1 |
In an example, a device (200) includes a semiconductor substrate (216) having a top surface (205). The device (200) also includes a P-doped well (210) formed in the semiconductor substrate (216) and extending downwardly from the top surf...
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WO/2023/163167A1 |
Provided are a single crystal thin film of a compound having a flat rock salt-type structure, and a production method therefor. A single crystal thin film according to the present invention comprises a single crystal thin film of a compo...
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WO/2023/163235A1 |
A semiconductor element (1) is provided with: a semiconductor layer (21) which has at least one MESA structure; a field plate (61) which is arranged so as to cover at least a part of the semiconductor layer (21); and an insulating film (...
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WO/2023/163744A1 |
Embodiments of the disclosure provide methods and electronic devices comprising a work function layer comprising a material that forms a weak silicide. The electronic devices comprise a silicon layer with the work function layer thereon ...
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WO/2023/163002A1 |
Provided is a composition capable of selectively removing silicon while suppressing damage to silicon oxide. This composition contains: a quaternary ammonium compound; and at least one cationic surfactant selected from the group consisti...
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WO/2023/162735A1 |
A semiconductor device (1) is a vertical field effect transistor (10) including: a first gate trench (17) extending in a first direction and a second gate trench (27) formed deeper than the first gate trench (17); a first gate insulating...
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WO/2023/161755A1 |
Provided is a storage device that includes a novel semiconductor device. The storage device comprises: a memory cell that includes a transistor and a capacitive element; and a conductor. The transistor includes one of a source electrode ...
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WO/2023/161757A1 |
Provided is a semiconductor device that enables miniaturization and high integration. The semiconductor device has: a first transistor that includes a first conductor, a first insulator, a first metal oxide, a second insulator, and a sec...
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WO/2023/159662A1 |
The present application discloses a display panel and a manufacturing method therefor. The display panel comprises a transistor layer, which comprises an oxide active layer and a first photocatalytic layer that are stacked. The materials...
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WO/2023/161133A1 |
A semiconductor device including a first spacer located on top of a substrate, where the first spacer has a first width in a first axis of a nanodevice. At least one fin located on top of the first spacer, where the at least one fin has ...
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WO/2023/161760A1 |
Provided is a stacked field-effect transistor (FET). The stacked FET comprises a top active region. The width of the top of the top active region is smaller than the width of bottom of the top active region. The stacked FET further compr...
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WO/2023/159894A1 |
Embodiments of the present application provide a semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a substrate; an epitaxial layer located on one side of the substrate, a doped region being for...
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WO/2023/159589A1 |
Embodiments of the present application relate to the technical field of semiconductors, and provide a chip and a manufacturing method therefor, a radio frequency power amplifier and a terminal, capable of ensuring that an epitaxial layer...
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WO/2023/161385A1 |
An integrated circuit device comprises at least one low voltage active semiconductor device formed a semiconductor substrate, and a depletion field effect potential divider (DFE-PD) formed above a major surface of the semiconductor subst...
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WO/2023/161386A1 |
An integrated circuit device comprises at least one low voltage active semiconductor device formed in a first substrate region of a semiconductor substrate, and a depletion field effect potential divider (DFE-PD) formed in a second subst...
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WO/2023/159578A1 |
Embodiments of the present application relate to the technical field of semiconductors, provide a semiconductor structure and an operating method thereof, a power amplification circuit, and an electronic device, and are used for improvin...
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WO/2023/160084A1 |
A manufacturing method for a P-type laterally diffused metal oxide semiconductor device, comprising: forming a N-type buried layer (220) in a substrate (210), forming a P-type region (230) located on the N-type buried layer (220), and fo...
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