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Matches 251 - 300 out of 852,675

Document Document Title
WO/2017/128637A1
A mobile hard disk, comprising a hard disk housing (1), a liner (2), and a pull-out flexible plastic piece (3) arranged between the hard disk housing (1) and the liner (2), the pull-out flexible plastic piece (3) partially covering the l...  
WO/2017/128771A1
A gate driving circuit, a driving method and a display apparatus, which alleviate or relieve a display anomaly of a display device caused by a leaked current and improve the display effect. The gate driving circuit comprises a first driv...  
WO/2017/131651A1
In one example in accordance with the present disclosure a memristive array is described. The array includes a number of memristive devices. A memristive device is switchable between states and is to store information. The memristive arr...  
WO/2017/131628A1
In one example in accordance with the present disclosure a memristive bit cell is described. The memristive bit cell includes a memristive device switchable between states. The memristive device is to store information. The memristive bi...  
WO/2017/128327A1
A method for stopping music, and a mobile terminal. The method comprises the following steps: receiving heart rate data of a user sent by a smart wristband (S101); determining whether the user is in a sleep state according to the heart r...  
WO/2017/132389A1
To provide enhanced operation of data storage devices and systems, various systems and apparatuses are provided herein. In a first example, a data storage assembly includes an enclosure configured to house at least one data storage devic...  
WO/2017/130082A1
A memory in which a write cycle time is longer than time for one clock cycle can be mounted on a processor. The processor includes a processor core, a bus, and a memory section. The memory section includes a first memory. A cell array of...  
WO/2017/131700A1
Addresses of memory cells that have errors corrected by error correction operations are evaluated to identify a failed row of memory. A post package repair is implemented on the failed row with a method comprising obtaining indications o...  
WO/2017/130810A1
In this recorded data processing method, a terminal device capable of communicating with an editing device which generates, from a plurality of sets of source data, content including a plurality of videos that are synchronized with one a...  
WO/2017/131653A1
Example implementations of the present disclosure relate to in situ transposition of the data values in a memory array. An example system may include a non-volatile memory (NVM) array, including a plurality of NVM elements, usable in per...  
WO/2017/131941A1
A memory and a method to operate the memory are provided. The memory includes a plurality of memory cells and a wordline driver configured to output a wordline. The memory cells are coupled to the wordline. A control circuit is configure...  
WO/2017/131584A1
Various embodiments may provide a memory cell including a magnetic pinned layer with a substantially fixed magnetization direction, a crystalline spacer layer in contact with the magnetic pinned layer, and a magnetic storage layer. The m...  
WO/2017/131636A1
Methods and apparatus to store fault data and/or status data associated with an integrated circuit (100) into a memristor system (106) are disclosed. An example method includes determining when a fault corresponding to an integrated circ...  
WO/2017/126014A1
The purposes of the present invention are: to provide a layered semiconductor device which is capable of improving production yield; and to provide a method for producing said layered semiconductor device. This layered semiconductor devi...  
WO/2017/125981A1
This magnetic recording medium is provided with a long base body and a magnetic layer containing powder of magnetic cubic ferrite particles. The sum of the squareness ratio in the longitudinal direction and the squareness ratio in the ve...  
WO/2017/125242A8
According to a method for cleaning a disc record having a groove area, the disc record is held relative to a megasonic transducer (10) to form a gap (13) between at least a portion of the groove area and the megasonic transducer (10), th...  
WO/2017/127070A1
An example consistent with the present disclosure includes a cage to house a storage device. The cage can be mounted within the server, and the cage can include a cage enclosure. The cage enclosure can include cage columns and side cage ...  
WO/2017/127222A1
Apparatuses and methods for multi-level communication architectures are disclosed herein. An example apparatus may include a driver circuit configured to convert a plurality of bitstreams into a plurality of multilevel signals. A count o...  
WO/2017/126544A1
The purpose of the present invention is to increase the efficiency with which silicon on a chip is used, and to easily reduce the size of a logic cell. To accomplish the purpose, this reconfigurable circuit includes: a logic memory unit ...  
WO/2017/126330A1
The present technology relates to a recording adjustment device, a recording adjustment method, and a program whereby it is possible to compensate for recording to an optical disc having a high linear density. A recording adjustment devi...  
WO/2017/124237A1
Provided in an embodiment of the present invention is a memory device, the memory device comprising an RRAM crossbar array used to perform a logic operation. A resistance value of a resistor in the RRAM crossbar array is configured as Ro...  
WO/2017/127046A1
Example drive cage panels for drive cages are disclosed. For example, a drive cage panel for a drive cage may include a plurality of air inlet holes in a front face of the drive cage panel, a plurality of air guides through a surface of ...  
WO/2017/127048A1
Example support devices for an electromagnetic interference shield of a drive carrier are disclosed. For example, a support device may include a first bar to extend parallel to a length of a bezel of the drive carrier and a second bar pa...  
WO/2017/126291A1
The purposes of the present invention are: to provide a layered semiconductor device capable of improving production yield; and to provide a method for producing said layered semiconductor device. This layered semiconductor device has, l...  
WO/2017/124731A1
The present invention relates to the field of display, and discloses a shift register, drive method thereof, GOA circuit, and display device to solve non-uniformity of display caused by an insufficient gate signal output in a large-sized...  
WO/2017/127104A1
Techniques for injecting a delay to simulate latency are provided. In one aspect, it may be determined that a current epoch should end. A delay may be injected. The delay may simulate the latency of non-volatile memory access during the ...  
WO/2017/127086A1
A circuit includes an engine to compute analog multiplication results between vectors of a sub-matrix. An analog to digital converter (ADC) generates a digital value for the analog multiplication results computed by the engine. A shifter...  
WO/2017/127193A1
A static random access memory is provided in which the word line assertion during a write operation is delayed until the discharge of a dummy bit line is detected.  
WO/2017/124873A1
An operation method of a resistive random access memory and a resistive random access memory device. The method comprises the following steps: applying an initial reset voltage to a memory cell in a resistive random access memory array; ...  
WO/2017/125242A1
According to a method for cleaning a disc record having a groove area, the disc record is held relative to a megasonic transducer (10) to form a gap (13) between at least a portion of the groove area and the megasonic transducer (10), th...  
WO/2017/124721A1
A shift register, gate drive circuit, and display device. The shift register comprises: an input module (1), a first reset module (2), a first control module (3), a second control module (4), a node voltage control module (5), and an out...  
WO/2017/126451A1
The purpose of the present invention is to provide a logic integrated circuit that increases the reliability of configurative information held in a switch while maintaining high damper resistance and a small chip area. This logic integra...  
WO/2017/122575A1
The purpose of the present invention is to provide a vertical magnetic recording medium which uses an Ru seed layer having a (002)-oriented hcp structure, and has a magnetic recording layer containing a (001)-oriented L10-type ordered al...  
WO/2017/121947A1
The invention relates to a directional magnetic field generator with a magnetic circuit comprising: a first vertical-axis pole end (37) arranged above a horizontal plane; and at least two second pole ends (28A to 28D) symmetrically arran...  
WO/2017/122247A1
A magnetic recording medium of the present invention is provided with a base body, a recording layer, and a layer, which is provided between the base body and the recording layer, and which contains a super elastic material.  
WO/2017/121176A1
A shifting register and a driving method therefor, a gate driving circuit and a display device. The shifting register comprises: a pre-charge module (1) connected to a pull-up node (PU), the pre-charge module (1) charges the pull-up node...  
WO/2017/121133A1
A shift register unit, a gate drive circuit, a display panel and a display device. The shift register unit combines a light-emitting signal output module (05) and a scanning signal output module (06), namely, a light-emitting shift regis...  
WO/2017/121144A1
The invention provides a shift register unit, comprising a first signal input end, a second signal input end, an input and reset module, a pull-up module, a pull-down module, a pull-down control module, a clock signal input end, a first ...  
WO/2017/122593A1
The present invention provides a vertical magnetic recording medium which uses a seed layer, and has a magnetic recording layer that contains an ordered alloy which is suitable for vertical magnetic recording. Alternatively, the present ...  
WO/2017/123776A1
Embodiments of the present invention use a NAND block as the basic write operation unit and ensure that the write operation uses the same basic unit as the erase operation. In this way, the flash product maintains the same level of granu...  
WO/2017/122497A1
This semiconductor circuit comprises: a first circuit configured to use the voltage of a first node to generate an inverted voltage therefrom and to apply the inverted voltage to a second node; a second circuit configured to use the volt...  
WO/2017/120902A1
Provided are a data collection method and speaker for tuning technology, said method comprising: recording a correlation between one or more sets, set by a user, of sound intensity ranges in an ambient environment and the volume in decib...  
WO/2017/122418A1
The present invention makes it possible to minimize data writing failures in a semiconductor storage unit having a transistor for each memory cell. In a first transistor, a gate is connected to a gate signal line and a source is connecte...  
WO/2017/120002A1
A method and an apparatus for generating an internal memory clock are provided. The apparatus includes a pulse generator configured to receive a first clock signal (320) in a first power domain (302) and initiate a second clock signal (3...  
WO/2017/117845A1
A gate driver on array (GOA) circuit (12), comprising a plurality of GOA circuit units (SR(1)-(SR(N)). In a GOA circuit unit (SR(n)), a capacitor is replaced with a latch module (200). A second transistor (T2) of the latch module (200) i...  
WO/2017/119796A1
Disclosed herein are an electronic device and a method of managing a playback rate of a plurality of images using an electronic device. The electronic device may include a display, an image capturing unit configured to obtain a plurality...  
WO/2017/118092A1
A shift register unit (200) and a driving method therefor, a scanning drive circuit (500) and a display apparatus (600). The shift register unit (200) comprises: a first control module (30) operable to a) output a signal synchronized wit...  
WO/2017/119995A3
In a non-volatile memory system, a fast bulk secure erase method for erasing data includes, in response to a secure erase command: applying charge to a portion of non-volatile memory in the non-volatile memory system, and performing an e...  
WO/2017/117802A1
A dual-interface bidirectional push-and-pull mobile storage apparatus (100), comprising a storage shell (10), a circuit board assembling component (20) slidably mounted in the storage shell (10) and a push-and-pull member (30), wherein t...  
WO/2017/118849A1
The present invention relates to a method of recording a video data stream, the method comprising: receiving a video data stream from a camera device; monitoring for an input from a user; in response to receipt of a first input from a us...  

Matches 251 - 300 out of 852,675