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Matches 151 - 200 out of 861,271

Document Document Title
WO/2020/153572A1
Provided are a method for training a model for detecting a reproduction interval of a specific event sound from a target sound, and an apparatus therefor. A method for training an event sound detection model according to an embodiment of...  
WO/2020/154647A1
Embodiments of the disclosure are drawn to apparatuses and methods for soft post-package repair (SPPR). After packaging, it may be necessary to perform post-package repair operations on rows of the memory. During a scan mode of an SPPR o...  
WO/2020/154352A1
A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect t...  
WO/2020/152264A1
An electronic device comprising circuitry configured to perform (402; 702; 1204) source separation (201) based on a received audio input to obtain a separated source, to perform onset detection (202) on the separated source to obtain an ...  
WO/2020/153139A1
The purpose of the present invention is to provide: a lubricant having excellent adsorptivity to a magnetic disk surface and contamination resistance; and a magnetic disc that has excellent durability and that uses the lubricant. This lu...  
WO/2020/152994A1
The purpose of the present invention is to suppress or prevent a dimensional change in a magnetic recording tape. The present technology provides a magnetic recording tape that has a layered structure having a magnetic layer, a base laye...  
WO/2020/150810A1
A system and method for bidirectionally based electrical information storage, processing and communication. Bidirectional memory (tristate) offers the capability to store and interpret multiple bits (Shannon's) of information per memory ...  
WO/2020/097098A3
Methods and apparatus for a three-dimensional (3D) array having aligned deep-trench contacts are disclosed. In an embodiment, a method includes forming an array stack having conductor layers and insulator layers, and forming a hard mask ...  
WO/2020/131893A3
A magnetic storage device (300) comprises spin orbit torque magnetic random access memory (SOT-MRAM) devices (104) at grid intersections of first wires (102) extending along a first direction and second wires (314) extending along a seco...  
WO/2020/152450A1
A method of providing edited media content is described. The method comprises: generating captured content and a representation of the captured content, the representation of the captured content having a smaller size than the captured c...  
WO/2020/153651A1
A neural network simulator according to an embodiment of the present invention may comprise: a first neuron simulator including a first magnetic tunnel junction structure for outputting a first output stream in which a low level and a hi...  
WO/2020/151065A1
A GOA component, a gate electrode driving circuit, and a display panel. The gate electrode driving circuit comprises: at least one clock signal source; a constant-voltage low level source (Vss); and the GOA component, comprising at least...  
WO/2020/154425A1
A computer-implemented method may include receiving at least three video clips of a sporting event, where each of the video clips may (i) be simultaneously captured over at least a portion of time, and (ii) include at least one common pl...  
WO/2020/150693A1
Described are systems and methods for generating personalized videos with customized text messages. An example method may commence with receiving a video template. The video template may include a sequence of frame images and preset text...  
WO/2020/150142A2
The present disclosure is drawn to, among other things, a magnetoresistive memory. The magnetoresistive memory comprises a plurality of magnetoresistive memory devices, wherein each magnetoresistive memory device includes a fixed magneti...  
WO/2020/147546A1
Disclosed are a shifting register unit (10), a gate drive circuit (20), a display device (1) and a driving method. The shifting register unit (10) comprises a first sub-circuit (100), a second sub-circuit (200) and a leakage proof circui...  
WO/2020/150074A1
An approach to a reduced-head hard disk drive (HDD) involves an actuator elevator assembly for moving an actuator assembly along at least one support feature to provide a head slider access to at least two different disk media of a disk ...  
WO/2020/131179A3
A resistive random access memory (ReRAM) device includes a bottom electrode and a top electrode with a switching layer disposed therebetween. The bottom electrode has a top surface in contact with a bottom surface of the switching layer....  
WO/2020/150017A1
The present disclosure relates to methods and devices for operation of a removable storage device. In some aspects, the device can initialize the operation of a removable storage device, such as with a host device. The device can also id...  
WO/2020/149939A1
A magnetoresistive memory device includes a magnetic-exchange-coupled layer stack containing a free layer, a reference layer and an electrically conductive, non-magnetic interlayer exchange coupling layer located between the free layer a...  
WO/2020/149375A1
The present invention makes it possible to increase an applied magnetic field on a sliding surface side of a magnetic identification sensor, thereby increasing an output of the sensor and stabilizing waveforms. Provided is a magnetic ide...  
WO/2020/149894A1
A memory device (10) may include a phase driver circuit (36) that may output a first voltage for refreshing a plurality of memory cells. The memory device (10) may also include a plurality of word line driver circuits (42) that may recei...  
WO/2020/147045A1
A shift register and a method and device for driving the same. In the shift register, a shift register subcircuit (200) outputs a gate scanning signal to drive a gate line. The shift register subcircuit (200) outputs a touch scanning sig...  
WO/2020/095041A3
Various implementations described herein refer to an integrated circuit having a row of bitcells that are chained together in series to operate as a ring oscillator. Each bitcell in the row of bitcells has multiple transistors that are i...  
WO/2020/150006A1
Methods, systems, and devices related to a memory system or scheme that includes a first memory device configured for low-energy access operations and a second memory device configured for storing high-density information and operations ...  
WO/2019/164547A8
Memory devices, systems including memory devices, and methods of operating memory devices and systems in which a memory device can include a voltage regulator for adjusting a supply voltage to an output voltage and providing the output v...  
WO/2020/104590A3
An encoder neural network is described which can encode a data item, such as a frame of a video, to form a respective encoded data item. Data items of a first data sequence are associated with respective data items of a second sequence, ...  
WO/2020/150692A1
Disclosed are systems and methods for template-based generation of personalized videos. An example method may commence with receiving video configuration data including a sequence of frame images, a sequence of face area parameters defin...  
WO/2020/147377A1
A shift register unit, a gate drive circuit, a display device, and a drive method. A shift register unit (10) comprises a first subunit (100) and an anti-creeping circuit (400), wherein the first subunit (100) comprises a first input cir...  
WO/2020/150435A1
Methods, systems, and devices for channel modulation for a memory device are described. A system may include a memory device and a host device coupled with the memory device. The system may be configured to communicate a first signal mod...  
WO/2020/150451A1
The present disclosure is drawn to, among other things, a magnetoresistive device and a magnetoresistive memory comprising a plurality of such magnetoresistive devices. In some aspects, a magnetoresistive device may include a magneticall...  
WO/2020/146997A1
A scan driving unit (10), a scan driving circuit (100), an array substrate (AY), and a display device. The scan driving unit (10) comprises a pull-up control unit (11), a pull-up output unit (12), a pull-down control unit (13), a pull-do...  
WO/2020/150419A1
A magnetic tunnel junction device is disclosed comprising a first device layer comprising a material having a magnetic moment; a second device layer comprising a material having a magnetic moment, e.g., wherein the magnetic moment of the...  
WO/2020/146224A1
A method and apparatus for encoding a video stream using video point cloud coding, the decoding including obtaining an input point cloud; dividing the input point cloud into a plurality of chunks, including a first chunk including a firs...  
WO/2020/145555A1
A ternary memory cell in a memory device comprising the ternary memory cell can comprise: a first inverter and second inverter which are cross-connected at a first node and second node and comprise a pull-up device and pull-down device p...  
WO/2020/142923A1
A shift register and driving method therefor, a gate driver circuit, and a display device. A shift register (10) comprises a blanking input circuit (100), a blanking control circuit (200), a blanking pull-down circuit (300), and a shift ...  
WO/2020/145114A1
Provided is a perpendicular magnetic recording medium that exhibits improved thermal stability and achieves reduction in switching magnetic field by providing a cap layer having characteristics (characteristics contributing to reducing s...  
WO/2020/143339A1
An output circuit and a chip. The output circuit comprises a first-stage circuit (100), a second-stage circuit (200), a third-stage circuit (300), and a fourth-stage circuit (400), wherein the first-stage circuit (100) is used for readin...  
WO/2020/146056A1
Techniques are provided for optimizing a program operation in a memory device to compensate for program speed variations due to block oxide thinning. In one approach, during a program operation, a program voltage which indicates program ...  
WO/2020/144819A1
This optical disk device (1) is provided with: a tray (10) that has a second surface and a first surface including a groove part (13) formed by a pair of tray ribs (12) which extend in one direction and a placement part (11) on which an ...  
WO/2020/144737A1
According to the present invention, a shift register (102) receives, as serial reception data (SDI) for each cycle of a serial clock (CLK), each bit of an address (A0 – A7) for selecting readout data (RDAT) from a plurality of pieces o...  
WO/2020/141597A1
Disclosed is a machine learning device that holds, by variable resistance memory elements, interlayer connection weight information of a neural network including an input layer, a hidden layer, and an output layer, wherein: input data in...  
WO/2020/072197A3
One or more enzymes are used to repair damage in synthetic DNA molecules that encode digital information. The enzymes are included in a repair mixture containing one or more of DNA polymerase, DNA ligase, T4 Endonuclease, Endonuclease IV...  
WO/2020/142190A1
Systems and methods are described to enable a memory device integrated in a memory module or system to disable one or more data bits, nibbles or bytes of the memory device., The memory device can be further configured to disable error or...  
WO/2020/142743A1
A structure for an integrated circuit is disclosed for storing data. The integrated circuit includes a memory cell array of bit cells configured in a static random access memory (SRAM) architecture. The memory cell array is coupled to wo...  
WO/2020/140195A1
A shift register and a driving method therefor, a gate driving circuit, and a display device. The shift register (10) can comprise a compensation selection circuit (100), a holding circuit (200) and N shift register circuits (300). The h...  
WO/2020/140765A1
The present disclosure provides a testing circuit and a testing method for a memory. The memory comprises at least one storage unit comprising a first end and a second end. The testing circuit comprises: a current application unit for pr...  
WO/2020/141261A1
According to an example embodiment, a method for processing two or more microphone signals is provided. The method comprises:deriving a first captured audio signal having one or more channels based on the two or more microphone signals r...  
WO/2020/140292A1
A shift register unit and a driving method, a gate driving circuit and a display device. The shift register unit (100), comprising an input end (IN), a first shift register sub-unit (110) and a second shift register sub-unit (120). The f...  
WO/2020/139690A1
A memory controller may read a number of memory cells at a NAND flash array to generate a first raw string. The memory controller may determine that a difference between a number of bits from the first raw string having a value of logica...  

Matches 151 - 200 out of 861,271