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JPH0795673B2 |
PCT No. PCT/GB86/00351 Sec. 371 Date Apr. 9, 1987 Sec. 102(e) Date Apr. 9, 1987 PCT Filed Jun. 18, 1986 PCT Pub. No. WO87/00365 PCT Pub. Date Jan. 15, 1987.A frequency dividing arrangement 5 comprises a frequency divider 6 coupled to an ...
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JPH0793568B2 |
An inverter for use in a binary counter comprises a flip-flop having first and second input/output nodes respectively applied with input signals of opposite polarities, a first field effect transistor having a source-drain path connected...
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JPH0789656B2 |
PURPOSE:To output a control signal even during a synchronizing period by providing plural data latches and disposing the difference between a counting stage value and a counting value to be synchronized on the completion of synchronizing...
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JPH07248741A |
PURPOSE: To reduce the current consumption in a shift register by constituting a data shift circuit to stop switching operation of a circuit not contributing to data shift. CONSTITUTION: In the shift register, a clock control circuit 6A ...
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JPH0787359B2 |
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JPH0787357B2 |
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JPH0787358B2 |
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JPH0787360B2 |
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JPH07245561A |
PURPOSE: To provide the pulse generator generating a pulse whose dividing ratio and duty ratio are optionally selected synchronously with a reference clock. CONSTITUTION: The generator is provided with a 1st counter 1 operated synchronou...
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JPH0783256B2 |
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JPH0783257B2 |
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JPH07221633A |
PURPOSE: To reduce power consumption while enabling the high-speed operation of a variable frequency division part. CONSTITUTION: This prescaler is provided with a variable frequency division means 1 composed of plural flip-flops for out...
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JPH07222028A |
PURPOSE: To provide the signal processing circuit in which a signal is stably outputted even when an input signal to a frequency divider circuit is deteriorated by superimposition of noise. CONSTITUTION: An identification with noise supe...
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JPH07202691A |
PURPOSE: To obtain a device having a fine change step for acquiring output frequency by supplying a frequency signal synthesized with a reference clock signal based on accumulation information. CONSTITUTION: An accumulation decoder 25 su...
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JPH07202682A |
PURPOSE: To form each bit cell by comparatively small number of elements on plural identical stages. CONSTITUTION: A counter cell includes a latch circuit, a control circuit and a pull-up circuit. The latch circuit is formed by a 1st clo...
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JPH07193491A |
PURPOSE: To provide desired frequency dividing ratio at high speed by setting the data of a data selecting circuit at a prescribed value. CONSTITUTION: When the frequency dividing ratio setting terminal of a variable frequency divider 1 ...
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JPH07183727A |
PURPOSE: To provide a circuit for multiplying a frequency by controlling a counter based on 1st and 2nd subordinate clock pulses and a control word. CONSTITUTION: A signal (a) is inputted to an input counter 1. Based on a 1st subordinate...
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JPH0767079B2 |
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JPH0731630Y2 |
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JPH0731631Y2 |
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JPH0767080B2 |
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JPH0731632Y2 |
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JPH07177038A |
PURPOSE: To simplify circuit configuration and to freely set a repeat frequency by dividing one timer/counter into a first timer/counter and a second timer/ counter operated independently. CONSTITUTION: An inital value is set on a reload...
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JPH07170173A |
PURPOSE: To allow the circuit to contribute to the high processing speed for a data processing unit. CONSTITUTION: When an operating mode signal MC is at a low level, 1/2 frequency division is conducted and when the signal MC is at a hig...
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JPH0761003B2 |
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JPH0761004B2 |
A circuit for generating clock signals includes a reference clock signal generator and a 1/N frequency divider for generating 1/N frequency divided clock signals. An up-counter counts the 1/N frequency divided clock signals until the occ...
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JPH0761011B2 |
Fractional frequency dividing arrangement. Fractional frequency dividers, particularly for use in frequency synthesizers, exhibit low-frequency phase disturbances which can only be eliminated to a limited extent and/or with unwanted ...
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JPH0761005B2 |
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JPH07162293A |
PURPOSE: To reduce the circuit size of a picture processor by obtaining a digital signal with 16.1MHz e.g. which is not integer times of 3.58MHz e.g. from a color subcarrier signal with 3.58MHz by means of a compact circuit in respect of...
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JPH0758903B2 |
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JPH0758904B2 |
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JPH0758905B2 |
Counter circuit apparatus which sequentially re-allocates lower-order counting operation in order to extend counter life. The counter is comprised of a plurality of lower order counters and at least one higher order counter. A count sele...
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JPH0758321B2 |
PURPOSE:To shorten the generation period of a carry signal from the least significant digit bit of cascaded counting circuits by cascading the small counting circuits and inputting counting input signals of the respective small counting ...
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JPH07154243A |
PURPOSE: To correct an oscillation frequency deviation for a clock oscillation circuit without use of a trimmer capacitor. CONSTITUTION: The device is provided with a nonvolatile correction memory 21 storing a correction value ΔM, a cor...
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JPH07154244A |
PURPOSE: To suppress the effect of a generated beat strip onto a screen by adopting the configuration such that a frequency division output of a frequency divider circuit has a frequency being a specific number of multiple of a frequency...
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JPH0754901B2 |
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JPH0754466B2 |
The invention relates to data source systems including digital circuits such as processors or control units in which a number of data lines are controlled in dependence of the position of a counter. A data source circuit of the system al...
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JPH07141897A |
PURPOSE: To attain the high speed of an operation by making the master circuit of a D flip-flop have a selecting function selecting either one of parallel input data and reducing a delay in a shift register. CONSTITUTION: In a case that ...
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JPH0748824B2 |
A frequency divider for dividing input pulses by a predetermined number is formed of an input means for receiving input pulses, a plural number of counters, each having a series connection of stages through which a count signal is respec...
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JPH0722897Y2 |
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JPH0746773B2 |
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JPH0744444B1 |
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JPH0744447B2 |
An improved multiple frequency digital phase-locked loop circuit 10 is described. The improved digital phase-locked loops utilizes a single circuit 12 to effect both phase and frequency adjustments. The multiple frequency digital phase-l...
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JPH0725627U |
[Constitution] The input clock 101 is input to both the ring counter 1 and the binary counter 2, and both counters start the counting operation at the same time. The binary counter 2 sends a count-up pulse of the final stage output 102 t...
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JPH0725628U |
[Purpose] It is an object of the present invention to provide a frequency dividing circuit capable of dividing by 3 with a small phase delay and a duty ratio of 50%. [Constitution] The first frequency divider circuit consisting of the fi...
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JPH07106954A |
PURPOSE: To reduce the operating frequency of a presettable counter and to produce a multiple pulse that includes a fraction of cycle of a clock pulse. CONSTITUTION: A presettable counter 1 counts the clock pulses received from a data in...
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JPH07106952A |
PURPOSE: To ensure the fast operation of an up/down counter despite a large number of bits. CONSTITUTION: An up/down counter consists of an inverter 1 which inverts a basic clock signal S1, an inverter 2 which inverts a control signal S3...
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JPH07106955A |
PURPOSE: To improve the operating reliability of a ternary counter. CONSTITUTION: A ternary counter consists of two trigger type flip-flops TFF1 and TFF2, two delay type flip-flops DFF1 and DFF2, and a NOR gate 15. The input clocks CK ar...
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JPH0728872B2 |
An electrosurgical generator 10 comprises a patient circuit which includes an active electrode 12 and a return electrode 14. Means 16 of generator 10 generates a pulse train and includes an MXN storage device U 1 having M memory location...
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JPH0787138A |
PURPOSE: To provide a method and device capable of realizing the long-distance data transmission of high frequency signal without remarkably increasing the cost of hardware by using the general IC and the general transmission line. CONST...
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