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JPH05335938A |
PURPOSE: To provide a counter able to make counting with high accuracy even when a period of an input signal is short or long with respect to the counter device used to count the input signal whose period is equal to or shorter than that...
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JPH05327481A |
PURPOSE: To ensure a stable counting operation by eliminating the timing error caused by the increase of the speed a system clock and also eliminating the delay of a latter half part caused by the parasitic capacity. CONSTITUTION: A syst...
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JPH05327485A |
PURPOSE: To provide a compact programmable dividing circuit which has the expansion properties by using the registers. CONSTITUTION: A programmable dividing circuit consists of a clock production circuit 1 which outputs a reference time ...
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JPH05327484A |
PURPOSE: To ensure a high speed operation and the high stability of a variable divider by inputting an input signals in common to the 1st-3rd clock input terminals and taking the output signal out of a 1st non-inverted electronic termina...
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JPH05327480A |
PURPOSE: To provide a synchronizing counter which eliminates the spike noises out of the ripple carry output and also attains a high speed operation. CONSTITUTION: A 1st flip-flop circuits 2, 4, 6 and 8 are cascaded at plural stages, and...
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JPH05327479A |
PURPOSE: To secure the sufficient holding time for the enable and clock signals which are inputted to a counter circuit of the next stage when a synchronizing counter circuit is constructed with the cascade connection of plural ripple ty...
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JPH05327483A |
PURPOSE: To improve the highest operating frequency without affecting operation of a dividing circuit carried out at a low frequency by connecting the inductive load in series to a load resistance. CONSTITUTION: The inductors L1 and L2 a...
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JPH05327482A |
PURPOSE: To secure the stable division output regardless of the frequency of an original pulse signal with a circuit which divides an original pulse signal CK. CONSTITUTION: A counter 10 is provided to count the number of pulses of an or...
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JPH05324116A |
PURPOSE: To reduce the influence of time to be required for carrying digit by connecting a circuit for always adding one count to the value of an n-bit timer counter and latching and inputting the added value to a timer data register. CO...
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JPH0546355Y2 |
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JPH05315944A |
PURPOSE: To obtain a circuit capable of executing rapid operation and having a small chip area by combining a synchronous counter and an asynchronous counter. CONSTITUTION: Each of D flip flops(FFs) 1, 4 generates an output signal at the...
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JPH0582794B2 |
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JPH05308280A |
PURPOSE: To generate a clock signal of plural sampling frequencies with one oscillating frequency. CONSTITUTION: An integral part of a frequency division number set by a frequency division register 200 is fetched by a subtraction counter...
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JPH05308279A |
PURPOSE: To obtain the carry signal generating circuit for a synchronous counter suitable for a high speed logic circuit system by adopting the circuit configuration in which a carry signal and a counter output are changed in a same timi...
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JPH05304465A |
PURPOSE: To realizea frequency dividing clock generating circuit and a screen display device having the circuit with configuration where one-chip conversion is perfectly executed without an exterior capacitor. CONSTITUTION: Flip-flops 21...
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JPH05304466A |
PURPOSE: To realize a clock circuit where time is optionally updated with simple configuration by newly providing a flip-flop circuit and a microprogram control part. CONSTITUTION: An up counter UC counts a fixed cycle clock, counts the ...
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JPH05300003A |
PURPOSE: To allow one and same chip to be compatible with two kinds of frequencies or over. CONSTITUTION: A logic processing section J2, logic level decision circuits E2, F2 and a constant current circuit A2 are formed by ECL configurati...
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JPH0580175B2 |
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JPH05291957A |
PURPOSE: To allow the comparator to make voltage comparison with high accuracy while receiving an input reference voltage in matching with an analog input voltage by setting two-way of comparison being comparison between external two inp...
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JPH05291944A |
PURPOSE: To reduce a delay time and to increase a highest frequency division frequency by switching a current switching control transistor(Tr) from a slightly-ON state into a strongly-ON state when a complementary clock signal is switche...
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JPH05284009A |
PURPOSE: To eliminate the need for the operation and excess terminals of a counting direction designating flag based on an instruction by discriminating a counting direction according to the state of a clock line signal and adding a leve...
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JPH05282171A |
PURPOSE: To provide a counter capable of checking an error so as not to change the number of '1's in all bits of the counter at the time of counting by the counter and easily executing the practical constitution of a circuit. CONSTITUTIO...
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JPH05276022A |
PURPOSE: To prevent an excess trigger signal from being generated when the generating timing of the trigger signal is desired to be delayed by using an AND circuit receiving a mask request signal and the trigger signal so as to mask a fi...
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JPH05276021A |
PURPOSE: To obtain a frequency division signal with the frequency division ratio of a different series simultaneously with the hardware configuration as small as possible. CONSTITUTION: A frequency division signal X whose frequency divis...
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JPH0576208B2 |
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JPH0575206B2 |
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JPH0574875B2 |
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JPH05268074A |
PURPOSE: To make the count value up and down contrastively in the specific cycle. CONSTITUTION: An updown control section 2 is provided with exclusive OR circuits 21-1, 21-2, and 21-3 ORing count signals 12a, 12b, and 12c and an updown c...
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JPH05268075A |
PURPOSE: To prevent the deviation of counting in the counter circuit when the clock changes slower than data. CONSTITUTION: A latch circuit L6 in the final stage and a dummy latch circuit L0 changing in phase are added on the front of a ...
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JPH05259894A |
PURPOSE: To provide the counter circuit in which one selector circuit and one test data input section connecting to the input side of the selector circuit are enough for the purpose. CONSTITUTION: The circuit is provided with a selector ...
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JPH05259895A |
PURPOSE: To generate a clock whose duty factor is 50% by applying 1/odd number frequency division to an inputted clock whose duty factor is 50%. CONSTITUTION: An external input signal to a signal line 105 is subject to 1/3 frequency divi...
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JPH05259824A |
PURPOSE: To prevent malfunction due to an unsharpened signal waveform of a data input signal due to a parasitic resistance and a parasitic capacitance of a wire even when a duty ratio of a clock signal is changed a little by inputting an...
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JPH05252026A |
PURPOSE: To provide an UP/DOWN counter circuit capable of operating normally counting even when an up clock input and a down clock input are duplicated timewise. CONSTITUTION: A storage circuit 1 fetches the output of a selector 2 by the...
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JPH0570048U |
[Purpose] A circuit that cancels the clock is configured with simple hardware. [Constitution] It is equipped with an n-bit binary counter 3'that combines n T-FFs, and the clock CLK is supplied from the line to the CLK terminal of the cou...
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JPH05243929A |
PURPOSE: To measure the correct delay time of a single logical gate with much higher precision compared with that in the past in a gate delay measuring instrument. CONSTITUTION: By inputting chain gate output signals outputted respective...
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JPH05243976A |
PURPOSE: To simplify constitution and to easily obtain the output frequency dividing signal of frequency dividing rate excepting for an integer by utilizing one oscillator oscillating a single frequency comparatively low. CONSTITUTION: T...
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JPH05243978A |
PURPOSE: To obtain a timing signal generation circuit which makes a clock frequency high and attains high integration by varying the primary setting value of a counter by way of a logical gate with a frame pulse from outside and the ripp...
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JPH0558301B2 |
PURPOSE:To efficiently process packet traffic by using a frame multiplexer to apply line concentration to the packet traffic incoming from plural subscribers. CONSTITUTION:In the system multiplexing the packet traffic for a D channel of ...
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JPH0557773B2 |
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JPH0554287B2 |
An endless counting apparatus comprises a first memory (9, 33) for storing a code of a first predetermined number of bits sufficient to represent the maximum value of each coded input expressed according to the binary notation, a second ...
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JPH0554138B2 |
An asynchronous FIFO (firstin, firstout) device suitable for use as a buffer comprises a stack having a plurality of sections. Each section has a data storage register and a control subassembly. Each assembly is associated with one of sa...
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JPH0559975U |
[Purpose] The purpose is to provide a 2/3 frequency divider circuit with a duty ratio of 50% that can be used as a system clock for 1-bit A / D and D / A converters without deterioration of distortion. [Constitution] The input clock freq...
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JPH0558855U |
An apparatus including a computer for generating a time duration signal is proposed, intended in particular for controlling fuel metering or ignition processes in internal combustion engines, wherein the time duration signal is formed in...
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JPH0551185B2 |
A semiconductor memory device comprises an address line, a write line, a read line, and a memory cell connected to the address, write and read lines, where the memory cell comprises a power source, an RHET, a switching element and a data...
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JPH0557932U |
[Purpose] The purpose is to correct the other output timings by changing the output timing of one counter. [Constitution] As a counter configuration that can be controlled by performing linked operations, one timing output is used as a t...
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JPH05191273A |
PURPOSE: To eliminate restriction on a range of value of a divisor to be used depending on the number of cells. CONSTITUTION: The circuit is provided with a prescaler consisting of (p) pieces of cascade connection frequency divider cells...
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JPH05185658A |
PURPOSE: To simplify a circuit for forming the printing timing pulse used in the driving of a low noise printing head. CONSTITUTION: (n) shift pulses successively shifted in phase by 1/n of a printing stroke T and having pulse width of T...
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JPH05183426A |
PURPOSE: To suppress a power noise with a periodicity caused at the count by making the number of change bits of a counter output constant. CONSTITUTION: An inverting output QB of flip-flops F0-F(n-2) and an output Q of a flip-flop F(n-1...
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JPH05183429A |
PURPOSE: To attain a stable operation at a high speed by using an output of a frequency divider circuit inputting an output of a prescaler and a carry of 1st and 2nd programmable counters for a frequency division ratio control signal of ...
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JPH05183427A |
PURPOSE: To reduce the circuit scale with respect to the counter circuit counting up or down the prescribed number for each input of one clock especially. CONSTITUTION: An OR circuit 22 ORs 1st and 2nd enable signals EN1, EN2 to generate...
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